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/drivers/clk/mxs/
Dclk-imx28.c33 #define SSP0 (CLKCTRL + 0x0090) macro
200 clks[ssp0_div] = mxs_clk_div("ssp0_div", "ssp0_sel", SSP0, 0, 9, 29); in mx28_clocks_init()
219 clks[ssp0] = mxs_clk_gate("ssp0", "ssp0_div", SSP0, 31); in mx28_clocks_init()