Home
last modified time | relevance | path

Searched refs:VID_UPPER_GPIO_CNTL (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/radeon/
Drv6xxd.h116 #define VID_UPPER_GPIO_CNTL 0x740 macro
Drv6xx_dpm.c735 WREG32_P(VID_UPPER_GPIO_CNTL, MEDIUM_BACKBIAS_VALUE, ~MEDIUM_BACKBIAS_VALUE); in rv6xx_program_backbias_stepping_parameters_except_lowest_entry()
737 WREG32_P(VID_UPPER_GPIO_CNTL, 0, ~MEDIUM_BACKBIAS_VALUE); in rv6xx_program_backbias_stepping_parameters_except_lowest_entry()
740 WREG32_P(VID_UPPER_GPIO_CNTL, HIGH_BACKBIAS_VALUE, ~HIGH_BACKBIAS_VALUE); in rv6xx_program_backbias_stepping_parameters_except_lowest_entry()
742 WREG32_P(VID_UPPER_GPIO_CNTL, 0, ~HIGH_BACKBIAS_VALUE); in rv6xx_program_backbias_stepping_parameters_except_lowest_entry()
777 WREG32_P(VID_UPPER_GPIO_CNTL, LOW_BACKBIAS_VALUE, ~LOW_BACKBIAS_VALUE); in rv6xx_program_backbias_stepping_parameters_lowest_entry()
779 WREG32_P(VID_UPPER_GPIO_CNTL, 0, ~LOW_BACKBIAS_VALUE); in rv6xx_program_backbias_stepping_parameters_lowest_entry()
Dr600_dpm.c536 tmp = RREG32(VID_UPPER_GPIO_CNTL); in r600_voltage_control_program_voltages()
538 WREG32(VID_UPPER_GPIO_CNTL, tmp); in r600_voltage_control_program_voltages()
Dr600d.h1419 #define VID_UPPER_GPIO_CNTL 0x740 macro