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Searched refs:VLINE_STATUS (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/radeon/
Devergreen.c4633 WREG32(VLINE_STATUS + EVERGREEN_CRTC0_REGISTER_OFFSET, VLINE_ACK); in evergreen_irq_ack()
4637 WREG32(VLINE_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET, VLINE_ACK); in evergreen_irq_ack()
4647 WREG32(VLINE_STATUS + EVERGREEN_CRTC2_REGISTER_OFFSET, VLINE_ACK); in evergreen_irq_ack()
4651 WREG32(VLINE_STATUS + EVERGREEN_CRTC3_REGISTER_OFFSET, VLINE_ACK); in evergreen_irq_ack()
4662 WREG32(VLINE_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET, VLINE_ACK); in evergreen_irq_ack()
4666 WREG32(VLINE_STATUS + EVERGREEN_CRTC5_REGISTER_OFFSET, VLINE_ACK); in evergreen_irq_ack()
Dsi.c6232 WREG32(VLINE_STATUS + EVERGREEN_CRTC0_REGISTER_OFFSET, VLINE_ACK); in si_irq_ack()
6236 WREG32(VLINE_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET, VLINE_ACK); in si_irq_ack()
6246 WREG32(VLINE_STATUS + EVERGREEN_CRTC2_REGISTER_OFFSET, VLINE_ACK); in si_irq_ack()
6250 WREG32(VLINE_STATUS + EVERGREEN_CRTC3_REGISTER_OFFSET, VLINE_ACK); in si_irq_ack()
6261 WREG32(VLINE_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET, VLINE_ACK); in si_irq_ack()
6265 WREG32(VLINE_STATUS + EVERGREEN_CRTC5_REGISTER_OFFSET, VLINE_ACK); in si_irq_ack()
Dsid.h762 #define VLINE_STATUS 0x6bb8 macro
Devergreend.h1259 #define VLINE_STATUS 0x6bb8 macro