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Searched refs:V_T5_ULP_MEMIO_ORDER (Results 1 – 2 of 2) sorted by relevance

/drivers/net/ethernet/chelsio/cxgb4/
Dt4_msg.h838 #define V_T5_ULP_MEMIO_ORDER(x) ((x) << S_T5_ULP_MEMIO_ORDER) macro
839 #define F_T5_ULP_MEMIO_ORDER V_T5_ULP_MEMIO_ORDER(1U)
/drivers/infiniband/hw/cxgb4/
Dmem.c82 req->cmd |= cpu_to_be32(V_T5_ULP_MEMIO_ORDER(1)); in _c4iw_write_mem_dma_aligned()