Searched refs:_CHV_CMN_DW5_CH0 (Results 1 – 4 of 4) sorted by relevance
| /drivers/gpu/drm/i915/ |
| D | intel_hdmi.c | 1296 val = vlv_dpio_read(dev_priv, pipe, _CHV_CMN_DW5_CH0); in chv_hdmi_pre_pll_enable()
1302 vlv_dpio_write(dev_priv, pipe, _CHV_CMN_DW5_CH0, val); in chv_hdmi_pre_pll_enable()
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| D | intel_dp.c | 2745 val = vlv_dpio_read(dev_priv, pipe, _CHV_CMN_DW5_CH0); in chv_dp_pre_pll_enable()
2751 vlv_dpio_write(dev_priv, pipe, _CHV_CMN_DW5_CH0, val); in chv_dp_pre_pll_enable()
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| D | i915_reg.h | 942 #define _CHV_CMN_DW5_CH0 0x8114 macro
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| D | intel_display.c | 1762 val = vlv_dpio_read(dev_priv, pipe, _CHV_CMN_DW5_CH0); in chv_disable_pll()
1764 vlv_dpio_write(dev_priv, pipe, _CHV_CMN_DW5_CH0, val); in chv_disable_pll()
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