| /drivers/net/wireless/rt2x00/ |
| D | rt2x00reg.h | 246 #define SET_FIELD(__reg, __type, __field, __value)\ argument
249 *(__reg) &= ~((__field).bit_mask); \
250 *(__reg) |= ((__value) << \
255 #define GET_FIELD(__reg, __type, __field) \ argument
258 ((__reg) & ((__field).bit_mask)) >> \
262 #define rt2x00_set_field32(__reg, __field, __value) \ argument
263 SET_FIELD(__reg, struct rt2x00_field32, __field, __value)
264 #define rt2x00_get_field32(__reg, __field) \ argument
265 GET_FIELD(__reg, struct rt2x00_field32, __field)
267 #define rt2x00_set_field16(__reg, __field, __value) \ argument
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| D | rt2500usb.c | 141 #define WAIT_FOR_BBP(__dev, __reg) \ argument
142 rt2500usb_regbusy_read((__dev), PHY_CSR8, PHY_CSR8_BUSY, (__reg))
143 #define WAIT_FOR_RF(__dev, __reg) \ argument
144 rt2500usb_regbusy_read((__dev), PHY_CSR10, PHY_CSR10_RF_BUSY, (__reg))
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| D | rt2400pci.c | 51 #define WAIT_FOR_BBP(__dev, __reg) \ argument
52 rt2x00mmio_regbusy_read((__dev), BBPCSR, BBPCSR_BUSY, (__reg))
53 #define WAIT_FOR_RF(__dev, __reg) \ argument
54 rt2x00mmio_regbusy_read((__dev), RFCSR, RFCSR_BUSY, (__reg))
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| D | rt61pci.c | 57 #define WAIT_FOR_BBP(__dev, __reg) \ argument
58 rt2x00mmio_regbusy_read((__dev), PHY_CSR3, PHY_CSR3_BUSY, (__reg))
59 #define WAIT_FOR_RF(__dev, __reg) \ argument
60 rt2x00mmio_regbusy_read((__dev), PHY_CSR4, PHY_CSR4_BUSY, (__reg))
61 #define WAIT_FOR_MCU(__dev, __reg) \ argument
63 H2M_MAILBOX_CSR_OWNER, (__reg))
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| D | rt2500pci.c | 51 #define WAIT_FOR_BBP(__dev, __reg) \ argument
52 rt2x00mmio_regbusy_read((__dev), BBPCSR, BBPCSR_BUSY, (__reg))
53 #define WAIT_FOR_RF(__dev, __reg) \ argument
54 rt2x00mmio_regbusy_read((__dev), RFCSR, RFCSR_BUSY, (__reg))
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| D | rt73usb.c | 58 #define WAIT_FOR_BBP(__dev, __reg) \ argument
59 rt2x00usb_regbusy_read((__dev), PHY_CSR3, PHY_CSR3_BUSY, (__reg))
60 #define WAIT_FOR_RF(__dev, __reg) \ argument
61 rt2x00usb_regbusy_read((__dev), PHY_CSR4, PHY_CSR4_BUSY, (__reg))
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| D | rt2800lib.c | 58 #define WAIT_FOR_BBP(__dev, __reg) \ argument
59 rt2800_regbusy_read((__dev), BBP_CSR_CFG, BBP_CSR_CFG_BUSY, (__reg))
60 #define WAIT_FOR_RFCSR(__dev, __reg) \ argument
61 rt2800_regbusy_read((__dev), RF_CSR_CFG, RF_CSR_CFG_BUSY, (__reg))
62 #define WAIT_FOR_RF(__dev, __reg) \ argument
63 rt2800_regbusy_read((__dev), RF_CSR_CFG0, RF_CSR_CFG0_BUSY, (__reg))
64 #define WAIT_FOR_MCU(__dev, __reg) \ argument
66 H2M_MAILBOX_CSR_OWNER, (__reg))
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| /drivers/media/dvb-frontends/ |
| D | stv090x_priv.h | 49 #define STV090x_READ_DEMOD(__state, __reg) (( \ argument
51 stv090x_read_reg(__state, STV090x_P2_##__reg) : \
52 stv090x_read_reg(__state, STV090x_P1_##__reg))
54 #define STV090x_WRITE_DEMOD(__state, __reg, __data) (( \ argument
56 stv090x_write_reg(__state, STV090x_P2_##__reg, __data) :\
57 stv090x_write_reg(__state, STV090x_P1_##__reg, __data))
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| /drivers/gpu/drm/armada/ |
| D | armada_crtc.h | 21 struct armada_regs *__reg = _r; \
22 __reg[_i].offset = _o; \
23 __reg[_i].mask = ~(_m); \
24 __reg[_i].val = _v; \
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| /drivers/net/ethernet/cadence/ |
| D | macb.h | 386 #define macb_or_gem_writel(__bp, __reg, __value) \ argument
389 gem_writel((__bp), __reg, __value); \
391 macb_writel((__bp), __reg, __value); \
394 #define macb_or_gem_readl(__bp, __reg) \ argument
398 __v = gem_readl((__bp), __reg); \
400 __v = macb_readl((__bp), __reg); \
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| /drivers/media/platform/s3c-camif/ |
| D | camif-regs.h | 160 #define CISTATUS_FRAMECNT(__reg) (((__reg) >> 26) & 0x3) argument
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| /drivers/pinctrl/spear/ |
| D | pinctrl-plgpio.c | 649 #define plgpio_prepare_reg(__reg, _off, _mask, _tmp) \ argument
651 _tmp = readl_relaxed(plgpio->regs.__reg + _off); \
653 plgpio->csave_regs[i].__reg = \
654 _tmp | (plgpio->csave_regs[i].__reg & _mask); \
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| /drivers/hwmon/ |
| D | adt7411.c | 216 #define ADT7411_BIT_ATTR(__name, __reg, __bit) \ argument
218 adt7411_set_bit, __bit, __reg)
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| /drivers/net/ethernet/sun/ |
| D | sunhme.c | 244 #define hme_write32(__hp, __reg, __val) \ argument
245 ((__hp)->write32((__reg), (__val)))
246 #define hme_read32(__hp, __reg) \ argument
247 ((__hp)->read32(__reg))
265 #define hme_write32(__hp, __reg, __val) \ argument
266 sbus_writel((__val), (__reg))
267 #define hme_read32(__hp, __reg) \ argument
268 sbus_readl(__reg)
290 #define hme_write32(__hp, __reg, __val) \ argument
291 writel((__val), (__reg))
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