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Searched refs:bXCTxAGC (Results 1 – 10 of 10) sorted by relevance

/drivers/staging/rtl8192u/
Dr819xU_phyreg.h284 #define bXCTxAGC 0xf000 macro
Dr819xU_phy.c830 rtl8192_setBBreg(dev, rFPGA0_TxGainStage, (bXBTxAGC|bXCTxAGC), in rtl8192_BB_Config_ParaFile()
/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_phyreg.h286 #define bXCTxAGC 0xf000 macro
Dr819xE_phyreg.h302 #define bXCTxAGC 0xf000 macro
Dr8192E_phy.c594 (bXBTxAGC|bXCTxAGC|bXDTxAGC), dwRegValue); in rtl8192_BB_Config_ParaFile()
678 (bXBTxAGC|bXCTxAGC|bXDTxAGC), u4RegValue); in rtl8192_phy_setTxPower()
/drivers/staging/rtl8712/
Drtl871x_mp_phy_regdef.h433 #define bXCTxAGC 0xf000 macro
Drtl871x_mp.c334 (bXBTxAGC|bXCTxAGC|bXDTxAGC), tmpAGC); in r8712_SetTxAGCOffset()
/drivers/staging/rtl8188eu/include/
Drtw_mp_phy_regdef.h461 #define bXCTxAGC 0xf000 macro
DHal8188EPhyReg.h519 #define bXCTxAGC 0xf000 macro
/drivers/staging/rtl8723au/include/
DHal8723APhyReg.h452 #define bXCTxAGC 0xf000 macro