| /drivers/clk/mxs/ |
| D | clk-pll.c | 30 struct clk_pll { struct
37 #define to_clk_pll(_hw) container_of(_hw, struct clk_pll, hw) argument
41 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_prepare()
52 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_unprepare()
59 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_enable()
68 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_disable()
76 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_recalc_rate()
92 struct clk_pll *pll; in mxs_clk_pll()
|
| /drivers/clk/qcom/ |
| D | clk-pll.c | 39 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_enable()
84 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_disable()
99 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_recalc_rate()
146 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_determine_rate()
159 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_set_rate()
195 static int wait_for_pll(struct clk_pll *pll) in wait_for_pll()
219 struct clk_pll *p = to_clk_pll(__clk_get_hw(__clk_get_parent(hw->clk))); in clk_pll_vote_enable()
235 clk_pll_set_fsm_mode(struct clk_pll *pll, struct regmap *regmap, u8 lock_count) in clk_pll_set_fsm_mode()
254 static void clk_pll_configure(struct clk_pll *pll, struct regmap *regmap, in clk_pll_configure()
281 void clk_pll_configure_sr(struct clk_pll *pll, struct regmap *regmap, in clk_pll_configure_sr()
[all …]
|
| D | clk-pll.h | 47 struct clk_pll { struct
66 #define to_clk_pll(_hw) container_of(to_clk_regmap(_hw), struct clk_pll, clkr) argument
83 void clk_pll_configure_sr(struct clk_pll *pll, struct regmap *regmap,
85 void clk_pll_configure_sr_hpm_lp(struct clk_pll *pll, struct regmap *regmap,
|
| D | gcc-ipq806x.c | 35 static struct clk_pll pll0 = {
62 static struct clk_pll pll3 = {
78 static struct clk_pll pll8 = {
105 static struct clk_pll pll14 = {
|
| D | mmcc-msm8974.c | 186 static struct clk_pll mmpll0 = {
213 static struct clk_pll mmpll1 = {
240 static struct clk_pll mmpll2 = {
255 static struct clk_pll mmpll3 = {
|
| D | mmcc-apq8084.c | 221 static struct clk_pll mmpll0 = {
248 static struct clk_pll mmpll1 = {
275 static struct clk_pll mmpll2 = {
290 static struct clk_pll mmpll3 = {
306 static struct clk_pll mmpll4 = {
|
| D | gcc-msm8974.c | 64 static struct clk_pll gpll0 = {
127 static struct clk_pll gpll1 = {
154 static struct clk_pll gpll4 = {
|
| D | gcc-msm8960.c | 35 static struct clk_pll pll3 = {
51 static struct clk_pll pll8 = {
78 static struct clk_pll pll14 = {
|
| D | gcc-apq8084.c | 108 static struct clk_pll gpll0 = {
171 static struct clk_pll gpll1 = {
198 static struct clk_pll gpll4 = {
|
| D | mmcc-msm8960.c | 84 static struct clk_pll pll2 = {
100 static struct clk_pll pll15 = {
|
| D | gcc-msm8660.c | 35 static struct clk_pll pll8 = {
|
| /drivers/clk/at91/ |
| D | clk-pll.c | 57 #define to_clk_pll(hw) container_of(hw, struct clk_pll, hw)
59 struct clk_pll { struct
74 struct clk_pll *pll = (struct clk_pll *)dev_id; in clk_pll_irq_handler() argument
84 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_prepare()
132 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_is_prepared()
141 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_unprepare()
153 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_recalc_rate()
161 static long clk_pll_get_best_div_mul(struct clk_pll *pll, unsigned long rate, in clk_pll_get_best_div_mul()
274 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_round_rate()
283 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_set_rate()
[all …]
|
| /drivers/clk/ |
| D | clk-nomadik.c | 143 struct clk_pll { struct
162 #define to_pll(_hw) container_of(_hw, struct clk_pll, hw) argument
167 struct clk_pll *pll = to_pll(hw); in pll_clk_enable()
187 struct clk_pll *pll = to_pll(hw); in pll_clk_disable()
206 struct clk_pll *pll = to_pll(hw); in pll_clk_is_enabled()
222 struct clk_pll *pll = to_pll(hw); in pll_clk_recalc_rate()
262 struct clk_pll *pll; in pll_clk_register()
|
| D | clk-vt8500.c | 50 struct clk_pll { struct
316 #define to_clk_pll(_hw) container_of(_hw, struct clk_pll, hw)
542 struct clk_pll *pll = to_clk_pll(hw); in vtwm_pll_set_rate()
585 struct clk_pll *pll = to_clk_pll(hw); in vtwm_pll_round_rate()
616 struct clk_pll *pll = to_clk_pll(hw); in vtwm_pll_recalc_rate()
654 struct clk_pll *pll_clk; in vtwm_pll_clk_init()
|
| /drivers/clk/spear/ |
| D | clk-vco-pll.c | 66 #define to_clk_pll(_hw) container_of(_hw, struct clk_pll, hw)
87 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_round_rate_index()
127 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_recalc_rate()
147 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_set_rate()
283 struct clk_pll *pll; in clk_register_vco_pll()
|
| D | clk.h | 102 struct clk_pll { struct
|
| /drivers/clk/keystone/ |
| D | pll.c | 73 struct clk_pll { struct
78 #define to_clk_pll(_hw) container_of(_hw, struct clk_pll, hw) argument
83 struct clk_pll *pll = to_clk_pll(hw); in clk_pllclk_recalc()
131 struct clk_pll *pll; in clk_register_pll()
|
| /drivers/staging/imx-drm/ |
| D | imx-ldb.c | 83 struct clk *clk_pll[2]; /* upstream clock we can adjust */ member
145 clk_get_rate(ldb->clk_pll[chno]), serial_clk); in imx_ldb_set_clock()
146 clk_set_rate(ldb->clk_pll[chno], serial_clk); in imx_ldb_set_clock()
149 clk_get_rate(ldb->clk_pll[chno])); in imx_ldb_set_clock()
345 ldb->clk_pll[chno] = devm_clk_get(ldb->dev, clkname); in imx_ldb_get_clk()
347 return PTR_ERR_OR_ZERO(ldb->clk_pll[chno]); in imx_ldb_get_clk()
|
| /drivers/clk/sirf/ |
| D | clk-common.c | 32 struct clk_pll { struct
37 #define to_pllclk(_hw) container_of(_hw, struct clk_pll, hw) argument
76 struct clk_pll *clk = to_pllclk(hw); in pll_clk_recalc_rate()
128 struct clk_pll *clk = to_pllclk(hw); in pll_clk_set_rate()
216 static struct clk_pll clk_pll1 = {
223 static struct clk_pll clk_pll2 = {
230 static struct clk_pll clk_pll3 = {
|