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Searched refs:control0 (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/i2c/
Dsil164_drv.c159 uint8_t control0 = sil164_read(client, SIL164_CONTROL0); in sil164_set_power_state() local
162 control0 |= SIL164_CONTROL0_POWER_ON; in sil164_set_power_state()
164 control0 &= ~SIL164_CONTROL0_POWER_ON; in sil164_set_power_state()
166 sil164_write(client, SIL164_CONTROL0, control0); in sil164_set_power_state()
/drivers/crypto/
Dmxs-dcp.c37 uint32_t control0; member
213 desc->control0 = MXS_DCP_CONTROL0_DECR_SEMAPHORE | in mxs_dcp_run_aes()
218 desc->control0 |= MXS_DCP_CONTROL0_PAYLOAD_KEY; in mxs_dcp_run_aes()
221 desc->control0 |= MXS_DCP_CONTROL0_CIPHER_ENCRYPT; in mxs_dcp_run_aes()
223 desc->control0 |= MXS_DCP_CONTROL0_CIPHER_INIT; in mxs_dcp_run_aes()
526 desc->control0 = MXS_DCP_CONTROL0_DECR_SEMAPHORE | in mxs_dcp_run_sha()
530 desc->control0 |= MXS_DCP_CONTROL0_HASH_INIT; in mxs_dcp_run_sha()
544 desc->control0 |= MXS_DCP_CONTROL0_HASH_TERM; in mxs_dcp_run_sha()
/drivers/video/fbdev/
Dvt8500lcdfb.c52 unsigned long control0; in vt8500lcd_set_par() local
122 control0 = readl(fbi->regbase) & ~0xf; in vt8500lcd_set_par()
137 writel(control0 | (reg_bpp << 1) | 0x100, fbi->regbase); in vt8500lcd_set_par()
/drivers/net/wireless/b43/
Ddma.h143 __le32 control0; member
Ddma.c220 desc->dma64.control0 = cpu_to_le32(ctl0); in op64_fill_descriptor()
/drivers/scsi/
Dgdth.h782 u8 control0; /* control0 register(unused) */ member