Searched refs:core_rev (Results 1 – 13 of 13) sorted by relevance
71 u8 core_rev = pcie2->core->id.rev; in bcma_core_pcie2_hw_ltr_war() local74 if (core_rev < 2 || core_rev == 10 || core_rev > 13) in bcma_core_pcie2_hw_ltr_war()107 u8 core_rev = pcie2->core->id.rev; in pciedev_crwlpciegen2() local110 pciewar160 = core_rev == 7 || core_rev == 9 || core_rev == 11; in pciedev_crwlpciegen2()111 pciewar162 = core_rev == 5 || core_rev == 7 || core_rev == 8 || in pciedev_crwlpciegen2()112 core_rev == 9 || core_rev == 11; in pciedev_crwlpciegen2()145 u8 core_rev = pcie2->core->id.rev; in pciedev_reg_pm_clk_period() local148 if (core_rev <= 13) { in pciedev_reg_pm_clk_period()
67 u32 core_rev = img_ir_read(priv, IMG_IR_CORE_REV); in img_ir_ident() local71 (core_rev & IMG_IR_DESIGNER) >> IMG_IR_DESIGNER_SHIFT, in img_ir_ident()72 (core_rev & IMG_IR_MAJOR_REV) >> IMG_IR_MAJOR_REV_SHIFT, in img_ir_ident()73 (core_rev & IMG_IR_MINOR_REV) >> IMG_IR_MINOR_REV_SHIFT, in img_ir_ident()74 (core_rev & IMG_IR_MAINT_REV) >> IMG_IR_MAINT_REV_SHIFT); in img_ir_ident()
114 if (dev->dev->core_rev >= 11) { in index_to_pioqueue_base()124 if (dev->dev->core_rev >= 11) in pio_txqueue_offset()131 if (dev->dev->core_rev >= 11) in pio_rxqueue_offset()147 q->rev = dev->dev->core_rev; in b43_setup_pioqueue_tx()181 q->rev = dev->dev->core_rev; in b43_setup_pioqueue_rx()
131 dev->core_rev = core->id.rev; in b43_bus_dev_bcma_init()230 dev->core_rev = sdev->id.revision; in b43_bus_dev_ssb_init()
612 B43_WARN_ON(dev->dev->core_rev < 3); in b43_tsf_read()642 B43_WARN_ON(dev->dev->core_rev < 3); in b43_tsf_write_locked()771 if (dev->dev->core_rev < 11) in b43_dummy_transmission()1195 if (awake && dev->dev->core_rev >= 5) { in b43_power_saving_ctl_bits()1353 if (dev->dev->core_rev < 5) in drain_txstatus_queue()1824 if (dev->dev->core_rev >= 3) { in b43_set_beacon_int()2271 const u8 rev = ctx->dev->dev->core_rev; in b43_try_request_fw()3104 if (dev->dev->core_rev <= 4) in b43_adjust_opmode()3269 if (dev->dev->core_rev < 5) in b43_chip_init()3282 if (dev->dev->core_rev < 3) { in b43_chip_init()[all …]
53 u8 core_rev; member
192 B43_WARN_ON(dev->dev->core_rev < 3); in b43_phy_lock()204 B43_WARN_ON(dev->dev->core_rev < 3); in b43_phy_unlock()
525 if (dev->dev->core_rev == 16) in b43_nphy_classifier()535 if (dev->dev->core_rev == 16) in b43_nphy_classifier()4073 if (dev->dev->core_rev == 11 || dev->dev->core_rev == 12) { in b43_nphy_tx_power_ctl_setup()4090 if (dev->dev->core_rev == 11 || dev->dev->core_rev == 12) in b43_nphy_tx_power_ctl_setup()4174 if (dev->dev->core_rev == 11 || dev->dev->core_rev == 12) { in b43_nphy_tx_power_ctl_setup()4195 if (dev->dev->core_rev == 11 || dev->dev->core_rev == 12) in b43_nphy_tx_power_ctl_setup()5936 if (dev->dev->core_rev == 11 || dev->dev->core_rev == 12) { in b43_nphy_op_recalc_txpower()5942 if (dev->dev->core_rev == 11 || dev->dev->core_rev == 12) in b43_nphy_op_recalc_txpower()6516 (dev->dev->core_rev == 11 || dev->dev->core_rev == 12))) { in b43_nphy_op_prepare_structs()
1176 B43_WARN_ON(dev->dev->core_rev < 5); in b43_dma_init()
29 u16 core_rev; member
500 priv->hw_params.core_rev = (rev & SF2_REV_MASK); in bcm_sf2_sw_setup()507 priv->hw_params.core_rev >> 8, priv->hw_params.core_rev & 0xff, in bcm_sf2_sw_setup()
119 u8 core_rev; member
1454 ioctl->data.chaninfo.core_rev = 0; in esas2r_ioctl_handler()