Searched refs:divp_shift (Results 1 – 5 of 5) sorted by relevance
| /drivers/clk/tegra/ |
| D | clk-tegra124.c | 162 .divp_shift = 20,
258 .divp_shift = 20,
332 .divp_shift = 20,
408 .divp_shift = 20,
448 .divp_shift = 24,
486 .divp_shift = 16,
513 .divp_shift = 20,
577 .divp_shift = 20,
695 .divp_shift = 20,
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| D | clk-tegra114.c | 182 .divp_shift = 20,
244 .divp_shift = 20,
317 .divp_shift = 20,
363 .divp_shift = 20,
491 .divp_shift = 20,
571 .divp_shift = 24,
599 .divp_shift = 16,
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| D | clk-pll.c | 204 #define divp_shift(p) (p)->params->div_nmp->divp_shift macro
208 #define divp_mask_shifted(p) (divp_mask(p) << divp_shift(p))
219 .divp_shift = PLL_BASE_DIVP_SHIFT,
508 (cfg->p << divp_shift(pll)); in _update_pll_mnp()
535 cfg->p = (val >> div_nmp->divp_shift) & divp_mask(pll); in _get_pll_mnp()
761 val |= sel.p << divp_shift(pll); in clk_plle_enable()
793 divp = (val >> pll->params->div_nmp->divp_shift) & (divp_mask(pll)); in clk_plle_recalc_rate()
1478 .divp_shift = PLLE_BASE_DIVP_SHIFT,
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| D | clk.h | 150 u8 divp_shift; member
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| D | clk-tegra30.c | 435 .divp_shift = 20,
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