Home
last modified time | relevance | path

Searched refs:dpll_md (Results 1 – 8 of 8) sorted by relevance

/drivers/gpu/drm/gma500/
Dcdv_intel_crt.c93 u32 adpa, dpll_md; in cdv_intel_crt_mode_set() local
108 dpll_md = REG_READ(dpll_md_reg); in cdv_intel_crt_mode_set()
110 dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK); in cdv_intel_crt_mode_set()
Dcdv_device.c532 .dpll_md = DPLL_A_MD,
557 .dpll_md = DPLL_B_MD,
Dpsb_drv.h283 u32 dpll_md; member
317 u32 dpll_md; member
Dcdv_intel_display.c794 …REG_WRITE(map->dpll_md, (0 << DPLL_MD_UDI_DIVIDER_SHIFT) | ((sdvo_pixel_multiply - 1) << DPLL_MD_U… in cdv_intel_crtc_mode_set()
/drivers/gpu/drm/i915/
Dintel_dsi.c376 pipe_config->dpll_hw_state.dpll_md = 0; in intel_dsi_get_config()
Dintel_display.c1559 I915_WRITE(DPLL_MD(crtc->pipe), crtc->config.dpll_hw_state.dpll_md); in vlv_enable_pll()
1606 I915_WRITE(DPLL_MD(pipe), crtc->config.dpll_hw_state.dpll_md); in chv_enable_pll()
1661 crtc->config.dpll_hw_state.dpll_md); in i9xx_enable_pll()
5700 u32 dpll, dpll_md; in vlv_update_pll() local
5715 dpll_md = (crtc->config.pixel_multiplier - 1) in vlv_update_pll()
5717 crtc->config.dpll_hw_state.dpll_md = dpll_md; in vlv_update_pll()
5819 crtc->config.dpll_hw_state.dpll_md = in chv_update_pll()
5963 u32 dpll_md = (crtc->config.pixel_multiplier - 1) in i9xx_update_pll() local
5965 crtc->config.dpll_hw_state.dpll_md = dpll_md; in i9xx_update_pll()
6484 pipe_config->dpll_hw_state.dpll_md = tmp; in i9xx_get_pipe_config()
[all …]
Di915_drv.h213 uint32_t dpll_md; member
Di915_debugfs.c2636 seq_printf(m, " dpll_md: 0x%08x\n", pll->hw_state.dpll_md); in i915_shared_dplls_info()