/drivers/media/platform/ti-vpe/ |
D | sc.c | 118 unsigned int dst_h) in sc_set_vs_coeffs() argument 126 if (dst_h > src_h) { in sc_set_vs_coeffs() 128 } else if (dst_h == src_h) { in sc_set_vs_coeffs() 131 sixteenths = (dst_h << 4) / src_h; in sc_set_vs_coeffs() 159 unsigned int dst_w, unsigned int dst_h) in sc_config_scaler() argument 188 if (src_w == dst_w && src_h == dst_h) { in sc_config_scaler() 223 if (dst_h < (src_h >> 2)) { in sc_config_scaler() 232 factor = (u16) ((dst_h << 10) / src_h); in sc_config_scaler() 248 src_h, dst_h, factor, row_acc_init_rav, in sc_config_scaler() 252 row_acc_inc = ((src_h - 1) << 16) / (dst_h - 1); in sc_config_scaler() [all …]
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D | sc.h | 202 unsigned int dst_h); 205 unsigned int dst_w, unsigned int dst_h);
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D | vpe.c | 814 unsigned int dst_h = d_q_data->c_rect.height; in set_srcdst_params() local 858 sc_set_vs_coeffs(ctx->dev->sc, ctx->sc_coeff_v.addr, src_h, dst_h); in set_srcdst_params() 862 src_w, src_h, dst_w, dst_h); in set_srcdst_params()
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/drivers/media/pci/ivtv/ |
D | ivtv-yuv.c | 408 f->tru_h, f->src_h, f->dst_h, f->src_y, f->dst_y); in ivtv_yuv_handle_vertical() 438 reg_2918 = (f->dst_h << 16) | (f->src_h + src_minor_y); in ivtv_yuv_handle_vertical() 440 reg_2918 = (f->dst_h << 16) | ((f->src_h + src_minor_y) << 1); in ivtv_yuv_handle_vertical() 443 reg_291c = (f->dst_h << 16) | ((f->src_h + src_minor_uv) >> 1); in ivtv_yuv_handle_vertical() 445 reg_291c = (f->dst_h << 16) | (f->src_h + src_minor_uv); in ivtv_yuv_handle_vertical() 447 reg_2964_base = (src_minor_y * ((f->dst_h << 16) / f->src_h)) >> 14; in ivtv_yuv_handle_vertical() 448 reg_2968_base = (src_minor_uv * ((f->dst_h << 16) / f->src_h)) >> 14; in ivtv_yuv_handle_vertical() 450 if (f->dst_h / 2 >= f->src_h && !f->interlaced_y) { in ivtv_yuv_handle_vertical() 451 master_height = (f->src_h * 0x00400000) / f->dst_h; in ivtv_yuv_handle_vertical() 452 if ((f->src_h * 0x00400000) - (master_height * f->dst_h) >= f->dst_h / 2) in ivtv_yuv_handle_vertical() [all …]
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D | ivtv-driver.h | 403 u32 dst_h; member
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/drivers/gpu/drm/ |
D | drm_rect.c | 163 int dst_h = drm_rect_height(dst); in drm_rect_calc_vscale() local 164 int vscale = drm_calc_scale(src_h, dst_h); in drm_rect_calc_vscale() 166 if (vscale < 0 || dst_h == 0) in drm_rect_calc_vscale() 250 int dst_h = drm_rect_height(dst); in drm_rect_calc_vscale_relaxed() local 251 int vscale = drm_calc_scale(src_h, dst_h); in drm_rect_calc_vscale_relaxed() 253 if (vscale < 0 || dst_h == 0) in drm_rect_calc_vscale_relaxed() 259 drm_rect_adjust_size(dst, 0, max_dst_h - dst_h); in drm_rect_calc_vscale_relaxed() 265 int max_src_h = dst_h * max_vscale; in drm_rect_calc_vscale_relaxed()
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/drivers/video/fbdev/msm/ |
D | mdp_ppp.c | 343 uint32_t dst_w, dst_h; in get_edge_cond() local 354 dst_h = req->dst_rect.w; in get_edge_cond() 357 dst_h = req->dst_rect.h; in get_edge_cond() 361 get_edge_info(req->src_rect.h, req->src_rect.y, dst_h, in get_edge_cond() 441 uint32_t dst_w, dst_h; in blit_scale() local 445 dst_h = req->dst_rect.w; in blit_scale() 448 dst_h = req->dst_rect.h; in blit_scale() 450 if ((req->src_rect.w == dst_w) && (req->src_rect.h == dst_h) && in blit_scale() 461 scale_params(req->src_rect.h, dst_h, 1, &phase_init_y, in blit_scale() 466 scale_factor_y = (dst_h * 10) / req->src_rect.h; in blit_scale()
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/drivers/gpu/drm/sti/ |
D | sti_layer.c | 97 layer->dst_h = clamp_val(dest_h, 0, mode->crtc_vdisplay - dest_y); in sti_layer_prepare() 114 layer->dst_w, layer->dst_h, layer->dst_x, layer->dst_y, in sti_layer_prepare()
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D | sti_layer.h | 101 int dst_w, dst_h; member
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D | sti_vid.c | 64 yds = sti_vtg_get_line_number(*mode, vid->dst_y + vid->dst_h - 1); in sti_vid_commit_layer()
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D | sti_gdp.c | 287 yds = sti_vtg_get_line_number(*mode, layer->dst_y + layer->dst_h - 1); in sti_gdp_prepare_layer()
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/drivers/gpu/drm/i915/ |
D | intel_overlay.c | 430 short dst_h; member 566 if (params->dst_h > 1) in update_scaling_factors() 568 /(params->dst_h); in update_scaling_factors() 738 iowrite32((params->dst_h << 16) | params->dst_w, ®s->DWINSZ); in intel_overlay_do_put_image() 888 tmp = ((rec->src_scan_h << 16) / rec->dst_h) >> 16; in check_overlay_scaling() 1128 params->dst_h = ((((u32)put_image_rec->dst_height) << 12) / in intel_overlay_put_image() 1132 params->dst_h = put_image_rec->dst_height; in intel_overlay_put_image()
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/drivers/gpu/drm/exynos/ |
D | exynos_drm_gsc.c | 912 u32 src_w, src_h, dst_w, dst_h; in gsc_set_prescaler() local 920 dst_h = dst->w; in gsc_set_prescaler() 923 dst_h = dst->h; in gsc_set_prescaler() 932 ret = gsc_get_ratio_shift(src_h, dst_h, &sc->pre_vratio); in gsc_set_prescaler() 942 sc->main_vratio = (src_h << 16) / dst_h; in gsc_set_prescaler()
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D | exynos_drm_fimc.c | 960 u32 src_w, src_h, dst_w, dst_h; in fimc_set_prescaler() local 973 dst_h = dst->w; in fimc_set_prescaler() 976 dst_h = dst->h; in fimc_set_prescaler() 986 vfactor = fls(src_h / dst_h / 2); in fimc_set_prescaler() 999 sc->vratio = (src_h << 14) / (dst_h << vfactor); in fimc_set_prescaler() 1001 sc->up_v = (dst_h >= src_h) ? true : false; in fimc_set_prescaler()
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/drivers/gpu/drm/radeon/ |
D | radeon_display.c | 1669 u32 src_h = 1, dst_h = 1; in radeon_crtc_scaling_mode_fixup() local 1697 dst_h = radeon_crtc->native_mode.hdisplay; in radeon_crtc_scaling_mode_fixup() 1718 dst_h = crtc->mode.hdisplay - (radeon_crtc->h_border * 2); in radeon_crtc_scaling_mode_fixup() 1740 b.full = dfixed_const(dst_h); in radeon_crtc_scaling_mode_fixup()
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