Searched refs:gen_fifo_stat_reg (Results 1 – 4 of 4) sorted by relevance
39 u32 gen_fifo_stat_reg = MIPI_GEN_FIFO_STAT_REG(pipe); in mdfld_wait_for_HS_DATA_FIFO() local46 (REG_READ(gen_fifo_stat_reg) & DSI_FIFO_GEN_HS_DATA_FULL)) { in mdfld_wait_for_HS_DATA_FIFO()57 u32 gen_fifo_stat_reg = MIPI_GEN_FIFO_STAT_REG(pipe); in mdfld_wait_for_HS_CTRL_FIFO() local63 while ((timeout < 20000) && (REG_READ(gen_fifo_stat_reg) in mdfld_wait_for_HS_CTRL_FIFO()74 u32 gen_fifo_stat_reg = MIPI_GEN_FIFO_STAT_REG(pipe); in mdfld_wait_for_DPI_CTRL_FIFO() local80 while ((timeout < 20000) && ((REG_READ(gen_fifo_stat_reg) & in mdfld_wait_for_DPI_CTRL_FIFO()
66 void mdfld_dsi_gen_fifo_ready(struct drm_device *dev, u32 gen_fifo_stat_reg, in mdfld_dsi_gen_fifo_ready() argument75 if ((REG_READ(gen_fifo_stat_reg) & fifo_stat) == fifo_stat) in mdfld_dsi_gen_fifo_ready()82 gen_fifo_stat_reg); in mdfld_dsi_gen_fifo_ready()
97 u32 gen_fifo_stat_reg = sender->mipi_gen_fifo_stat_reg; in wait_for_gen_fifo_empty() local101 if ((mask & REG_READ(gen_fifo_stat_reg)) == mask) in wait_for_gen_fifo_empty()105 DRM_ERROR("fifo is NOT empty 0x%08x\n", REG_READ(gen_fifo_stat_reg)); in wait_for_gen_fifo_empty()
362 u32 gen_fifo_stat_reg, u32 fifo_stat);