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Searched refs:is_lvds (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/gma500/
Dcdv_intel_display.c223 struct gma_clock_t *clock, bool is_lvds, u32 ddi_select) in cdv_dpll_set_clock_cdv() argument
266 if (pipe == 1 && !is_lvds && !(ddi_select & DP_MASK)) { in cdv_dpll_set_clock_cdv()
593 bool is_crt = false, is_lvds = false, is_tv = false; in cdv_intel_crtc_mode_set() local
612 is_lvds = true; in cdv_intel_crtc_mode_set()
656 if (is_lvds && dev_priv->lvds_use_ssc) { in cdv_intel_crtc_mode_set()
716 } else if (is_lvds) { in cdv_intel_crtc_mode_set()
739 cdv_dpll_set_clock_cdv(dev, crtc, &clock, is_lvds, ddi_select); in cdv_intel_crtc_mode_set()
748 if (is_lvds) { in cdv_intel_crtc_mode_set()
859 bool is_lvds; in cdv_intel_crtc_clock_get() local
868 is_lvds = (pipe == 1) && (REG_READ(LVDS) & LVDS_PORT_EN); in cdv_intel_crtc_clock_get()
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Dpsb_intel_display.c117 bool is_lvds = false, is_tv = false; in psb_intel_crtc_mode_set() local
137 is_lvds = true; in psb_intel_crtc_mode_set()
163 if (is_lvds) { in psb_intel_crtc_mode_set()
233 if (is_lvds) { in psb_intel_crtc_mode_set()
317 bool is_lvds; in psb_intel_crtc_clock_get() local
326 is_lvds = (pipe == 1) && (REG_READ(LVDS) & LVDS_PORT_EN); in psb_intel_crtc_clock_get()
336 is_lvds = (pipe == 1) && (dev_priv->regs.psb.saveLVDS & in psb_intel_crtc_clock_get()
344 if (is_lvds) { in psb_intel_crtc_clock_get()
Doaktrail_crtc.c380 bool is_lvds = false; in oaktrail_crtc_mode_set() local
410 is_lvds = true; in oaktrail_crtc_mode_set()
536 if (is_lvds) in oaktrail_crtc_mode_set()
Dpsb_intel_sdvo.c125 bool is_lvds; member
695 if (psb_intel_sdvo->is_lvds && in psb_intel_sdvo_create_preferred_input_timing()
968 } else if (psb_intel_sdvo->is_lvds) { in psb_intel_sdvo_mode_fixup()
1026 if (psb_intel_sdvo->is_tv || psb_intel_sdvo->is_lvds) { in psb_intel_sdvo_mode_set()
1175 if (psb_intel_sdvo->is_lvds) { in psb_intel_sdvo_mode_valid()
1433 psb_intel_sdvo->is_lvds = false; in psb_intel_sdvo_detect()
1441 psb_intel_sdvo->is_lvds = psb_intel_sdvo->sdvo_lvds_fixed_mode != NULL; in psb_intel_sdvo_detect()
1613 psb_intel_sdvo->is_lvds = true; in psb_intel_sdvo_get_lvds_modes()
2245 psb_intel_sdvo->is_lvds = false; in psb_intel_sdvo_output_setup()
/drivers/gpu/drm/i915/
Dintel_sdvo.c135 bool is_lvds; member
776 if (intel_sdvo->is_lvds && in intel_sdvo_create_preferred_input_timing()
1140 } else if (intel_sdvo->is_lvds) { in intel_sdvo_compute_config()
1214 if (intel_sdvo->is_lvds) in intel_sdvo_pre_enable()
1241 if (intel_sdvo->is_tv || intel_sdvo->is_lvds) in intel_sdvo_pre_enable()
1567 if (intel_sdvo->is_lvds) { in intel_sdvo_mode_valid()
1794 intel_sdvo->is_lvds = false; in intel_sdvo_detect()
1799 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL; in intel_sdvo_detect()
1974 intel_sdvo->is_lvds = true; in intel_sdvo_get_lvds_modes()
2650 intel_sdvo->is_lvds = false; in intel_sdvo_output_setup()
Dintel_display.c6209 bool is_lvds = false, is_dsi = false; in i9xx_crtc_mode_set() local
6216 is_lvds = true; in i9xx_crtc_mode_set()
6247 if (is_lvds && dev_priv->lvds_downclock_avail) { in i9xx_crtc_mode_set()
6878 bool is_lvds = false; in ironlake_get_refclk() local
6883 is_lvds = true; in ironlake_get_refclk()
6889 if (is_lvds && intel_panel_use_ssc(dev_priv) && num_connectors < 2) { in ironlake_get_refclk()
7067 bool ret, is_lvds = false; in ironlake_compute_clocks() local
7072 is_lvds = true; in ironlake_compute_clocks()
7091 if (is_lvds && dev_priv->lvds_downclock_avail) { in ironlake_compute_clocks()
7134 bool is_lvds = false, is_sdvo = false; in ironlake_compute_dpll() local
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