Searched refs:lane_value (Results 1 – 1 of 1) sorted by relevance
| /drivers/gpu/drm/gma500/ |
| D | cdv_intel_display.c | 232 u32 lane_reg, lane_value; in cdv_dpll_set_clock_cdv() local
346 cdv_sb_read(dev, lane_reg, &lane_value); in cdv_dpll_set_clock_cdv()
347 lane_value &= ~(LANE_PLL_MASK); in cdv_dpll_set_clock_cdv()
348 lane_value |= LANE_PLL_ENABLE | LANE_PLL_PIPE(pipe); in cdv_dpll_set_clock_cdv()
349 cdv_sb_write(dev, lane_reg, lane_value); in cdv_dpll_set_clock_cdv()
352 cdv_sb_read(dev, lane_reg, &lane_value); in cdv_dpll_set_clock_cdv()
353 lane_value &= ~(LANE_PLL_MASK); in cdv_dpll_set_clock_cdv()
354 lane_value |= LANE_PLL_ENABLE | LANE_PLL_PIPE(pipe); in cdv_dpll_set_clock_cdv()
355 cdv_sb_write(dev, lane_reg, lane_value); in cdv_dpll_set_clock_cdv()
358 cdv_sb_read(dev, lane_reg, &lane_value); in cdv_dpll_set_clock_cdv()
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