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Searched refs:lcdc (Results 1 – 5 of 5) sorted by relevance

/drivers/video/fbdev/omap/
Dlcdc.c80 } lcdc; variable
84 lcdc.irq_mask |= mask; in enable_irqs()
89 lcdc.irq_mask &= ~mask; in disable_irqs()
120 l |= lcdc.irq_mask | OMAP_LCDC_IRQ_DONE; /* enabled IRQs */ in enable_controller()
142 init_completion(&lcdc.last_frame_complete); in disable_controller()
144 if (!wait_for_completion_timeout(&lcdc.last_frame_complete, in disable_controller()
146 dev_err(lcdc.fbdev->dev, "timeout waiting for FRAME DONE\n"); in disable_controller()
157 dev_err(lcdc.fbdev->dev, in reset_controller()
166 dev_err(lcdc.fbdev->dev, in reset_controller()
184 struct omapfb_plane_struct *plane = lcdc.fbdev->fb_info[0]->par; in setup_lcd_dma()
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DMakefile7 objs-yy := omapfb_main.o lcdc.o
/drivers/video/fbdev/
Dsh_mobile_lcdcfb.c293 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr]); in lcdc_write_chan()
295 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] + in lcdc_write_chan()
302 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] + in lcdc_write_chan_mirror()
309 return ioread32(chan->lcdc->base + chan->reg_offs[reg_nr]); in lcdc_read_chan()
315 iowrite32(data, ovl->channel->lcdc->base + reg); in lcdc_write_overlay()
316 iowrite32(data, ovl->channel->lcdc->base + reg + SIDE_B_OFFSET); in lcdc_write_overlay()
409 lcdc_write(ch->lcdc, _LDDWD0R, data | LDDWDxR_WDACT); in lcdc_sys_write_index()
410 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0); in lcdc_sys_write_index()
411 lcdc_write(ch->lcdc, _LDDWAR, LDDWAR_WA | in lcdc_sys_write_index()
413 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0); in lcdc_sys_write_index()
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Dsh_mobile_lcdcfb.h43 struct sh_mobile_lcdc_chan *lcdc; member
56 struct sh_mobile_lcdc_priv *lcdc; member
Dsh_mobile_hdmi.c847 struct sh_mobile_lcdc_chan *ch = hdmi->entity.lcdc; in sh_hdmi_read_edid()
1179 struct sh_mobile_lcdc_chan *ch = hdmi->entity.lcdc; in sh_hdmi_edid_work_fn()