Home
last modified time | relevance | path

Searched refs:msk (Results 1 – 25 of 33) sorted by relevance

12

/drivers/media/usb/pvrusb2/
Dpvrusb2-ctrl.c221 int msk; in pvr2_ctrl_get_valname() local
224 for (idx = 0, msk = 1; val; idx++, msk <<= 1) { in pvr2_ctrl_get_valname()
225 if (val & msk) { in pvr2_ctrl_get_valname()
305 static unsigned int gen_bitmask_string(int msk,int val,int msk_only, in gen_bitmask_string() argument
318 for (idx = 0, sm = 1; msk; idx++, sm <<= 1) { in gen_bitmask_string()
319 if (sm & msk) { in gen_bitmask_string()
320 msk &= ~sm; in gen_bitmask_string()
410 int msk; in parse_mtoken() local
412 for (idx = 0, msk = 1; valid_bits; idx++, msk <<= 1) { in parse_mtoken()
413 if (!(msk & valid_bits)) continue; in parse_mtoken()
[all …]
Dpvrusb2-debugifc.c28 unsigned long msk; member
268 u32 msk,val; in pvr2_debugifc_do1cmd() local
282 ret = debugifc_parse_unsigned_number(wptr,wlen,&msk); in pvr2_debugifc_do1cmd()
289 val = msk; in pvr2_debugifc_do1cmd()
290 msk = 0xffffffff; in pvr2_debugifc_do1cmd()
293 ret = pvr2_hdw_gpio_chg_dir(hdw,msk,val); in pvr2_debugifc_do1cmd()
295 ret = pvr2_hdw_gpio_chg_out(hdw,msk,val); in pvr2_debugifc_do1cmd()
Dpvrusb2-debug.h24 #define pvr2_trace(msk, fmt, arg...) do {if(msk & pvrusb2_debug) printk(KERN_INFO "pvrusb2: " fmt "… argument
Dpvrusb2-hdw.h284 int pvr2_hdw_gpio_chg_dir(struct pvr2_hdw *hdw,u32 msk,u32 val);
285 int pvr2_hdw_gpio_chg_out(struct pvr2_hdw *hdw,u32 msk,u32 val);
Dpvrusb2-hdw-internal.h66 typedef int (*pvr2_ctlf_set_value)(struct pvr2_ctrl *,int msk,int val);
67 typedef int (*pvr2_ctlf_val_to_sym)(struct pvr2_ctrl *,int msk,int val,
Dpvrusb2-sysfs.c235 int valid_bits, msk; in show_bits() local
240 for (msk = 1; valid_bits; msk <<= 1) { in show_bits()
241 if (!(msk & valid_bits)) continue; in show_bits()
242 valid_bits &= ~msk; in show_bits()
243 pvr2_ctrl_get_valname(cip->cptr, msk, buf + bcnt, in show_bits()
Dpvrusb2-hdw.c865 static int ctrl_std_val_to_sym(struct pvr2_ctrl *cptr,int msk,int val, in ctrl_std_val_to_sym() argument
869 *len = pvr2_std_id_to_str(bufPtr,bufSize,msk & val); in ctrl_std_val_to_sym()
959 #define DEFMASK(msk,tab) \ argument
961 .def.type_bitmask.valid_bits = msk, \
1843 v4l2_std_id msk; /* Which bits we care about */ member
1930 if (std_eeprom_maps[idx].msk ? in pvr2_hdw_setup_std()
1933 std_eeprom_maps[idx].msk) : in pvr2_hdw_setup_std()
4697 static unsigned int print_input_mask(unsigned int msk, in print_input_mask() argument
4703 if (!((1 << idx) & msk)) continue; in print_input_mask()
5015 int pvr2_hdw_gpio_chg_dir(struct pvr2_hdw *hdw,u32 msk,u32 val) in pvr2_hdw_gpio_chg_dir() argument
[all …]
/drivers/mtd/nand/
Dnand_bbt.c94 uint8_t msk = (mark & BBT_ENTRY_MASK) << ((block & BBT_ENTRY_MASK) * 2); in bbt_mark_entry() local
95 chip->bbt[block >> BBT_ENTRY_SHIFT] |= msk; in bbt_mark_entry()
182 uint8_t msk = (uint8_t)((1 << bits) - 1); in read_bbt() local
221 uint8_t tmp = (dat >> j) & msk; in read_bbt()
222 if (tmp == msk) in read_bbt()
629 uint8_t msk[4]; in write_bbt() local
701 msk[2] = ~rcode; in write_bbt()
703 case 1: sft = 3; sftmsk = 0x07; msk[0] = 0x00; msk[1] = 0x01; in write_bbt()
704 msk[3] = 0x01; in write_bbt()
706 case 2: sft = 2; sftmsk = 0x06; msk[0] = 0x00; msk[1] = 0x01; in write_bbt()
[all …]
/drivers/gpio/
Dgpio-mvebu.c509 u32 msk; in mvebu_gpio_dbg_show() local
516 msk = 1 << i; in mvebu_gpio_dbg_show()
517 is_out = !(io_conf & msk); in mvebu_gpio_dbg_show()
523 out & msk ? "hi" : "lo", in mvebu_gpio_dbg_show()
524 blink & msk ? "(blink )" : ""); in mvebu_gpio_dbg_show()
529 (data_in ^ in_pol) & msk ? "hi" : "lo", in mvebu_gpio_dbg_show()
530 in_pol & msk ? "lo" : "hi"); in mvebu_gpio_dbg_show()
531 if (!((edg_msk | lvl_msk) & msk)) { in mvebu_gpio_dbg_show()
535 if (edg_msk & msk) in mvebu_gpio_dbg_show()
537 if (lvl_msk & msk) in mvebu_gpio_dbg_show()
[all …]
Dgpio-pch.c360 u32 msk; in pch_gpio_probe() local
412 msk = (1 << gpio_pins[chip->ioh]) - 1; in pch_gpio_probe()
413 iowrite32(msk, &chip->reg->imask); in pch_gpio_probe()
414 iowrite32(msk, &chip->reg->ien); in pch_gpio_probe()
/drivers/net/wireless/rtlwifi/
Dpwrseqcmd.h77 u8 msk; member
87 #define GET_PWR_CFG_MASK(__PWR_CMD) (__PWR_CMD.msk)
/drivers/staging/rtl8723au/include/
DHalPwrSeqCmd.h105 u8 msk; member
116 #define GET_PWR_CFG_MASK(__PWR_CMD) __PWR_CMD.msk
/drivers/staging/rtl8188eu/include/
Dpwrseqcmd.h74 u8 msk; member
84 #define GET_PWR_CFG_MASK(__PWR_CMD) __PWR_CMD.msk
/drivers/isdn/mISDN/
Dsocket.c72 struct mISDN_sock *msk; in mISDN_send() local
75 msk = container_of(ch, struct mISDN_sock, ch); in mISDN_send()
78 if (msk->sk.sk_state == MISDN_CLOSED) in mISDN_send()
81 err = sock_queue_rcv_skb(&msk->sk, skb); in mISDN_send()
90 struct mISDN_sock *msk; in mISDN_ctrl() local
92 msk = container_of(ch, struct mISDN_sock, ch); in mISDN_ctrl()
97 msk->sk.sk_state = MISDN_CLOSED; in mISDN_ctrl()
Dstack.c428 struct mISDN_sock *msk = container_of(ch, struct mISDN_sock, ch); in connect_layer1() local
453 sk_add_node(&msk->sk, &dev->D.st->l1sock.head); in connect_layer1()
571 struct mISDN_sock *msk = container_of(ch, struct mISDN_sock, ch); in delete_channel() local
594 sk_del_node_init(&msk->sk); in delete_channel()
/drivers/video/fbdev/aty/
Dmach64_cursor.c145 u8 *msk = (u8 *)cursor->mask; in atyfb_cursor() local
163 m = *msk++; in atyfb_cursor()
/drivers/net/can/
Dbfin_can.c131 bfin_write(&reg->msk[RECEIVE_STD_CHL + i].amh, 0x1FFF); in bfin_can_set_reset_mode()
132 bfin_write(&reg->msk[RECEIVE_STD_CHL + i].aml, 0xFFFF); in bfin_can_set_reset_mode()
140 bfin_write(&reg->msk[RECEIVE_EXT_CHL + i].amh, 0x1FFF); in bfin_can_set_reset_mode()
141 bfin_write(&reg->msk[RECEIVE_EXT_CHL + i].aml, 0xFFFF); in bfin_can_set_reset_mode()
/drivers/net/arcnet/
Darc-rimi.c78 #define AINTMASK(msk) writeb((msk),_INTMASK) argument
Dcom90io.c78 #define AINTMASK(msk) outb((msk),_INTMASK) argument
Dcom90xx.c98 #define AINTMASK(msk) outb((msk),_INTMASK) argument
/drivers/video/console/
Dbitblit.c317 u8 msk = 0xff; in bit_cursor() local
351 mask[i++] = ~msk; in bit_cursor()
354 mask[i++] = msk; in bit_cursor()
Dfbcon_ccw.c31 u8 c, msk = ~(0xff << offset), msk1 = 0; in ccw_update_attr() local
34 msk <<= (8 - mod); in ccw_update_attr()
45 c |= msk; in ccw_update_attr()
Dfbcon_ud.c340 u8 msk = 0xff; in ud_cursor() local
376 mask[i++] = msk; in ud_cursor()
381 mask[i++] = ~msk; in ud_cursor()
Dfbcon_cw.c30 u8 c, msk = ~(0xff >> offset); in cw_update_attr() local
36 c |= msk; in cw_update_attr()
/drivers/net/ethernet/marvell/
Dskge.c628 u32 msk = skge_read32(hw, B2_IRQM_MSK); in skge_get_coalesce() local
630 if (msk & rxirqmask[port]) in skge_get_coalesce()
632 if (msk & txirqmask[port]) in skge_get_coalesce()
646 u32 msk = skge_read32(hw, B2_IRQM_MSK); in skge_set_coalesce() local
650 msk &= ~rxirqmask[port]; in skge_set_coalesce()
655 msk |= rxirqmask[port]; in skge_set_coalesce()
660 msk &= ~txirqmask[port]; in skge_set_coalesce()
665 msk |= txirqmask[port]; in skge_set_coalesce()
669 skge_write32(hw, B2_IRQM_MSK, msk); in skge_set_coalesce()
670 if (msk == 0) in skge_set_coalesce()
[all …]

12