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Searched refs:nCur40MhzPrimeSC (Results 1 – 14 of 14) sorted by relevance

/drivers/staging/rtl8723au/hal/
Drtl8723a_phycfg.c953 (pHalData->nCur40MhzPrimeSC << 5); in _PHY_SetBWMode23a92C()
981 (pHalData->nCur40MhzPrimeSC >> 1)); in _PHY_SetBWMode23a92C()
983 pHalData->nCur40MhzPrimeSC); in _PHY_SetBWMode23a92C()
987 (pHalData->nCur40MhzPrimeSC == in _PHY_SetBWMode23a92C()
1068 pHalData->nCur40MhzPrimeSC = Offset; in PHY_SetBWMode23a8723A()
Dodm.c451 if (pHalData->nCur40MhzPrimeSC == 1) in odm_CommonInfoSelfUpdate()
453 else if (pHalData->nCur40MhzPrimeSC == 2) in odm_CommonInfoSelfUpdate()
Dhal_com.c635 regTmp = (pHalData->nCur40MhzPrimeSC) << 5; in rtl8723a_ack_preamble()
/drivers/staging/rtl8192u/
Dr819xU_phy.c1595 priv->nCur40MhzPrimeSC>>1); in rtl8192_SetBWModeWorkItem()
1598 priv->nCur40MhzPrimeSC); in rtl8192_SetBWModeWorkItem()
1682 priv->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_UPPER; in rtl8192_SetBWMode()
1684 priv->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_LOWER; in rtl8192_SetBWMode()
1686 priv->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_DONT_CARE; in rtl8192_SetBWMode()
Dr8192U.h1028 u8 nCur40MhzPrimeSC; member
Dr8192U_core.c1558 tx_fwinfo->TxSubCarrier = priv->nCur40MhzPrimeSC; in rtl8192_tx()
/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_phy.c1241 (priv->nCur40MhzPrimeSC>>1)); in rtl8192_SetBWModeWorkItem()
1243 priv->nCur40MhzPrimeSC); in rtl8192_SetBWModeWorkItem()
1294 priv->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_UPPER; in rtl8192_SetBWMode()
1296 priv->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_LOWER; in rtl8192_SetBWMode()
1298 priv->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_DONT_CARE; in rtl8192_SetBWMode()
Drtl_core.h798 u8 nCur40MhzPrimeSC; member
Dr8192E_dev.c1224 pTxFwInfo->TxSubCarrier = priv->nCur40MhzPrimeSC; in rtl8192_tx_fill_desc()
/drivers/staging/rtl8188eu/hal/
Dphy.c276 (hal_data->nCur40MhzPrimeSC<<5); in phy_set_bw_mode_callback()
296 (hal_data->nCur40MhzPrimeSC>>1)); in phy_set_bw_mode_callback()
298 hal_data->nCur40MhzPrimeSC); in phy_set_bw_mode_callback()
300 (hal_data->nCur40MhzPrimeSC == HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1); in phy_set_bw_mode_callback()
331 hal_data->nCur40MhzPrimeSC = offset; in phy_set_bw_mode()
Drtl8188e_dm.c124 ODM_CmnInfoHook(dm_odm, ODM_CMNINFO_SEC_CHNL_OFFSET, &(hal_data->nCur40MhzPrimeSC)); in Update_ODM_ComInfo_88E()
Dusb_halinit.c1532 regTmp = (haldata->nCur40MhzPrimeSC)<<5; in SetHwReg8188EU()
/drivers/staging/rtl8188eu/include/
Drtl8188e_hal.h221 u8 nCur40MhzPrimeSC;/* Control channel sub-carrier */ member
/drivers/staging/rtl8723au/include/
Drtl8723a_hal.h268 u8 nCur40MhzPrimeSC;/* Control channel sub-carrier */ member