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Searched refs:parent_names (Results 1 – 25 of 128) sorted by relevance

123456

/drivers/clk/qcom/
Dgcc-apq8084.c118 .parent_names = (const char *[]){ "xo" },
129 .parent_names = (const char *[]){ "gpll0" },
141 .parent_names = gcc_xo_gpll0,
153 .parent_names = gcc_xo_gpll0,
165 .parent_names = gcc_xo_gpll0,
181 .parent_names = (const char *[]){ "xo" },
192 .parent_names = (const char *[]){ "gpll1" },
208 .parent_names = (const char *[]){ "xo" },
219 .parent_names = (const char *[]){ "gpll4" },
240 .parent_names = gcc_xo_gpll0,
[all …]
Dgcc-msm8974.c74 .parent_names = (const char *[]){ "xo" },
85 .parent_names = (const char *[]){ "gpll0" },
97 .parent_names = gcc_xo_gpll0,
109 .parent_names = gcc_xo_gpll0,
121 .parent_names = gcc_xo_gpll0,
137 .parent_names = (const char *[]){ "xo" },
148 .parent_names = (const char *[]){ "gpll1" },
164 .parent_names = (const char *[]){ "xo" },
175 .parent_names = (const char *[]){ "gpll4" },
194 .parent_names = gcc_xo_gpll0,
[all …]
Dmmcc-msm8974.c196 .parent_names = (const char *[]){ "xo" },
207 .parent_names = (const char *[]){ "mmpll0" },
223 .parent_names = (const char *[]){ "xo" },
234 .parent_names = (const char *[]){ "mmpll1" },
249 .parent_names = (const char *[]){ "xo" },
265 .parent_names = (const char *[]){ "xo" },
277 .parent_names = mmcc_xo_mmpll0_mmpll1_gpll0,
302 .parent_names = mmcc_xo_mmpll0_mmpll1_gpll0,
326 .parent_names = mmcc_xo_mmpll0_mmpll1_gpll0,
345 .parent_names = mmcc_xo_mmpll0_mmpll1_gpll0,
[all …]
Dmmcc-apq8084.c231 .parent_names = (const char *[]){ "xo" },
242 .parent_names = (const char *[]){ "mmpll0" },
258 .parent_names = (const char *[]){ "xo" },
269 .parent_names = (const char *[]){ "mmpll1" },
284 .parent_names = (const char *[]){ "xo" },
300 .parent_names = (const char *[]){ "xo" },
315 .parent_names = (const char *[]){ "xo" },
327 .parent_names = mmcc_xo_mmpll0_mmpll1_gpll0,
352 .parent_names = mmcc_xo_mmpll0_mmpll1_gpll0,
376 .parent_names = mmcc_xo_mmpll0_mmpll1_gpll0,
[all …]
Dgcc-msm8660.c45 .parent_names = (const char *[]){ "pxo" },
56 .parent_names = (const char *[]){ "pll8" },
131 .parent_names = gcc_pxo_pll8,
147 .parent_names = (const char *[]){
182 .parent_names = gcc_pxo_pll8,
198 .parent_names = (const char *[]){
233 .parent_names = gcc_pxo_pll8,
249 .parent_names = (const char *[]){
284 .parent_names = gcc_pxo_pll8,
300 .parent_names = (const char *[]){
[all …]
Dgcc-ipq806x.c45 .parent_names = (const char *[]){ "pxo" },
56 .parent_names = (const char *[]){ "pll0" },
72 .parent_names = (const char *[]){ "pxo" },
88 .parent_names = (const char *[]){ "pxo" },
99 .parent_names = (const char *[]){ "pll8" },
115 .parent_names = (const char *[]){ "pxo" },
126 .parent_names = (const char *[]){ "pll14" },
230 .parent_names = gcc_pxo_pll8,
246 .parent_names = (const char *[]){
281 .parent_names = gcc_pxo_pll8,
[all …]
Dgcc-msm8960.c45 .parent_names = (const char *[]){ "pxo" },
61 .parent_names = (const char *[]){ "pxo" },
72 .parent_names = (const char *[]){ "pll8" },
88 .parent_names = (const char *[]){ "pxo" },
99 .parent_names = (const char *[]){ "pll14" },
187 .parent_names = gcc_pxo_pll8,
203 .parent_names = (const char *[]){
238 .parent_names = gcc_pxo_pll8,
254 .parent_names = (const char *[]){
289 .parent_names = gcc_pxo_pll8,
[all …]
Dmmcc-msm8960.c94 .parent_names = (const char *[]){ "pxo" },
110 .parent_names = (const char *[]){ "pxo" },
171 .parent_names = mmcc_pxo_pll8_pll2,
186 .parent_names = (const char *[]){ "camclk0_src" },
220 .parent_names = mmcc_pxo_pll8_pll2,
235 .parent_names = (const char *[]){ "camclk1_src" },
269 .parent_names = mmcc_pxo_pll8_pll2,
284 .parent_names = (const char *[]){ "camclk2_src" },
324 .parent_names = mmcc_pxo_pll8_pll2,
338 .parent_names = (const char *[]){ "csi0_src" },
[all …]
/drivers/clk/sirf/
Dclk-common.c198 .parent_names = pll_clk_parents,
205 .parent_names = pll_clk_parents,
212 .parent_names = pll_clk_parents,
275 .parent_names = pll_clk_parents,
449 .parent_names = dmn_clk_parents,
463 .parent_names = dmn_clk_parents,
478 .parent_names = dmn_clk_parents,
500 .parent_names = dmn_clk_parents,
528 .parent_names = dmn_clk_parents,
543 .parent_names = dmn_clk_parents,
[all …]
/drivers/clk/
Dclk-axm5516.c148 .parent_names = (const char *[]){
160 .parent_names = (const char *[]){
172 .parent_names = (const char *[]){
184 .parent_names = (const char *[]){
196 .parent_names = (const char *[]){
212 .parent_names = (const char *[]){
226 .parent_names = (const char *[]){
240 .parent_names = (const char *[]){
254 .parent_names = (const char *[]){
268 .parent_names = (const char *[]){
[all …]
Dclk-ppc-corenet.c74 const char **parent_names; in core_mux_init() local
88 parent_names = kzalloc((sizeof(char *) * count), GFP_KERNEL); in core_mux_init()
89 if (!parent_names) { in core_mux_init()
95 parent_names[i] = of_clk_get_parent_name(np, i); in core_mux_init()
121 init.parent_names = parent_names; in core_mux_init()
144 kfree(parent_names); in core_mux_init()
/drivers/clk/berlin/
Dbg2.c505 const char *parent_names[9]; in berlin2_clock_setup() local
575 parent_names[0] = clk_names[SYSPLL]; in berlin2_clock_setup()
576 parent_names[1] = clk_names[REFCLK]; in berlin2_clock_setup()
577 clk = clk_register_mux(NULL, "syspll_byp", parent_names, 2, in berlin2_clock_setup()
583 parent_names[0] = clk_names[MEMPLL]; in berlin2_clock_setup()
584 parent_names[1] = clk_names[REFCLK]; in berlin2_clock_setup()
585 clk = clk_register_mux(NULL, "mempll_byp", parent_names, 2, in berlin2_clock_setup()
591 parent_names[0] = clk_names[CPUPLL]; in berlin2_clock_setup()
592 parent_names[1] = clk_names[REFCLK]; in berlin2_clock_setup()
593 clk = clk_register_mux(NULL, "cpupll_byp", parent_names, 2, in berlin2_clock_setup()
[all …]
/drivers/clk/ti/
Dcomposite.c63 const char **parent_names; member
126 const char **parent_names = NULL; in ti_clk_register_composite() local
163 parent_names = comp->parent_names; in ti_clk_register_composite()
174 parent_names, num_parents, in ti_clk_register_composite()
237 const char **parent_names; in ti_clk_add_component() local
248 parent_names = kzalloc((sizeof(char *) * num_parents), GFP_KERNEL); in ti_clk_add_component()
249 if (!parent_names) in ti_clk_add_component()
253 parent_names[i] = of_clk_get_parent_name(node, i); in ti_clk_add_component()
257 kfree(parent_names); in ti_clk_add_component()
262 clk->parent_names = parent_names; in ti_clk_add_component()
Dmux.c108 const char **parent_names, u8 num_parents, in _register_mux() argument
127 init.parent_names = parent_names; in _register_mux()
158 const char **parent_names; in of_mux_clk_setup() local
170 parent_names = kzalloc((sizeof(char *) * num_parents), GFP_KERNEL); in of_mux_clk_setup()
171 if (!parent_names) in of_mux_clk_setup()
175 parent_names[i] = of_clk_get_parent_name(node, i); in of_mux_clk_setup()
197 clk = _register_mux(NULL, node->name, parent_names, num_parents, flags, in of_mux_clk_setup()
204 kfree(parent_names); in of_mux_clk_setup()
Dclk-dra7-atl.c171 const char **parent_names = NULL; in of_dra7_atl_clock_setup() local
193 parent_names = kzalloc(sizeof(char *), GFP_KERNEL); in of_dra7_atl_clock_setup()
195 if (!parent_names) in of_dra7_atl_clock_setup()
198 parent_names[0] = of_clk_get_parent_name(node, 0); in of_dra7_atl_clock_setup()
200 init.parent_names = parent_names; in of_dra7_atl_clock_setup()
206 kfree(parent_names); in of_dra7_atl_clock_setup()
210 kfree(parent_names); in of_dra7_atl_clock_setup()
Dapll.c155 kfree(clk_hw->hw.init->parent_names); in omap_clk_register_apll()
162 kfree(clk_hw->hw.init->parent_names); in omap_clk_register_apll()
172 const char **parent_names = NULL; in of_dra7_apll_setup() local
194 parent_names = kzalloc(sizeof(char *) * init->num_parents, GFP_KERNEL); in of_dra7_apll_setup()
195 if (!parent_names) in of_dra7_apll_setup()
199 parent_names[i] = of_clk_get_parent_name(node, i); in of_dra7_apll_setup()
201 init->parent_names = parent_names; in of_dra7_apll_setup()
216 kfree(parent_names); in of_dra7_apll_setup()
359 init->parent_names = &parent_name; in of_omap2_apll_setup()
/drivers/clk/rockchip/
Dclk.h89 const char **parent_names; member
106 .parent_names = _pnames, \
117 const char *name, const char **parent_names, u8 num_parents,
150 const char **parent_names, u8 num_parents,
169 const char **parent_names; member
191 .parent_names = pnames, \
212 .parent_names = (const char *[]){ pname }, \
230 .parent_names = (const char *[]){ pname }, \
249 .parent_names = pnames, \
267 .parent_names = pnames, \
[all …]
Dclk.c42 const char **parent_names, u8 num_parents, void __iomem *base, in rockchip_clk_register_branch() argument
96 clk = clk_register_composite(NULL, name, parent_names, num_parents, in rockchip_clk_register_branch()
111 const char **parent_names, u8 num_parents, void __iomem *base, in rockchip_clk_register_frac_branch() argument
149 clk = clk_register_composite(NULL, name, parent_names, num_parents, in rockchip_clk_register_frac_branch()
202 list->parent_names, list->num_parents, in rockchip_clk_register_plls()
231 list->parent_names, list->num_parents, in rockchip_clk_register_branches()
239 list->name, list->parent_names[0], in rockchip_clk_register_branches()
246 list->parent_names[0], flags, in rockchip_clk_register_branches()
256 list->parent_names, list->num_parents, in rockchip_clk_register_branches()
268 list->parent_names[0], flags, in rockchip_clk_register_branches()
[all …]
/drivers/clk/at91/
Dclk-slow.c141 init.parent_names = &parent_name; in at91_clk_register_slow_osc()
253 init.parent_names = NULL; in at91_clk_register_slow_rc_osc()
334 const char **parent_names, in at91_clk_register_sam9x5_slow() argument
341 if (!sckcr || !name || !parent_names || !num_parents) in at91_clk_register_sam9x5_slow()
350 init.parent_names = parent_names; in at91_clk_register_sam9x5_slow()
371 const char *parent_names[2]; in of_at91sam9x5_clk_slow_setup() local
381 parent_names[i] = of_clk_get_parent_name(np, i); in of_at91sam9x5_clk_slow_setup()
382 if (!parent_names[i]) in of_at91sam9x5_clk_slow_setup()
388 clk = at91_clk_register_sam9x5_slow(sckcr, name, parent_names, in of_at91sam9x5_clk_slow_setup()
410 const char **parent_names, in at91_clk_register_sam9260_slow() argument
[all …]
Dclk-smd.c118 const char **parent_names, u8 num_parents) in at91sam9x5_clk_register_smd() argument
130 init.parent_names = parent_names; in at91sam9x5_clk_register_smd()
150 const char *parent_names[SMD_SOURCE_MAX]; in of_at91sam9x5_clk_smd_setup() local
158 parent_names[i] = of_clk_get_parent_name(np, i); in of_at91sam9x5_clk_smd_setup()
159 if (!parent_names[i]) in of_at91sam9x5_clk_smd_setup()
165 clk = at91sam9x5_clk_register_smd(pmc, name, parent_names, in of_at91sam9x5_clk_smd_setup()
Dclk-master.c137 const char **parent_names, in at91_clk_register_master() argument
146 if (!pmc || !irq || !name || !num_parents || !parent_names) in at91_clk_register_master()
155 init.parent_names = parent_names; in at91_clk_register_master()
223 const char *parent_names[MASTER_SOURCE_MAX]; in of_at91_clk_master_setup() local
232 parent_names[i] = of_clk_get_parent_name(np, i); in of_at91_clk_master_setup()
233 if (!parent_names[i]) in of_at91_clk_master_setup()
248 parent_names, layout, in of_at91_clk_master_setup()
/drivers/clk/ux500/
Dclk-sysctrl.c119 const char **parent_names, in clk_reg_sysctrl() argument
168 clk_sysctrl_init.parent_names = parent_names; in clk_reg_sysctrl()
188 const char **parent_names = (parent_name ? &parent_name : NULL); in clk_reg_sysctrl_gate() local
191 return clk_reg_sysctrl(dev, name, parent_names, num_parents, in clk_reg_sysctrl_gate()
206 const char **parent_names = (parent_name ? &parent_name : NULL); in clk_reg_sysctrl_gate_fixed_rate() local
209 return clk_reg_sysctrl(dev, name, parent_names, num_parents, in clk_reg_sysctrl_gate_fixed_rate()
217 const char **parent_names, in clk_reg_sysctrl_set_parent() argument
224 return clk_reg_sysctrl(dev, name, parent_names, num_parents, in clk_reg_sysctrl_set_parent()
/drivers/clk/versatile/
Dclk-sp810.c141 const char *parent_names[2]; in clk_sp810_of_setup() local
154 parent_names[0] = of_clk_get_parent_name(node, sp810->refclk_index); in clk_sp810_of_setup()
158 parent_names[1] = of_clk_get_parent_name(node, sp810->timclk_index); in clk_sp810_of_setup()
160 if (parent_names[0] <= 0 || parent_names[1] <= 0) { in clk_sp810_of_setup()
172 init.parent_names = parent_names; in clk_sp810_of_setup()
173 init.num_parents = ARRAY_SIZE(parent_names); in clk_sp810_of_setup()
/drivers/clk/tegra/
Dclk-periph.c142 const char **parent_names, int num_parents, in _tegra_clk_register_periph() argument
162 init.parent_names = parent_names; in _tegra_clk_register_periph()
190 const char **parent_names, int num_parents, in tegra_clk_register_periph() argument
194 return _tegra_clk_register_periph(name, parent_names, num_parents, in tegra_clk_register_periph()
199 const char **parent_names, int num_parents, in tegra_clk_register_periph_nodiv() argument
204 return _tegra_clk_register_periph(name, parent_names, num_parents, in tegra_clk_register_periph_nodiv()
/drivers/clk/bcm/
Dclk-kona-setup.c540 static const char **parent_names; in parent_process() local
582 parent_names = kmalloc(parent_count * sizeof(parent_names), GFP_KERNEL); in parent_process()
583 if (!parent_names) { in parent_process()
595 kfree(parent_names); in parent_process()
603 parent_names[j] = clocks[i]; in parent_process()
608 *names = parent_names; in parent_process()
618 const char **parent_names = NULL; in clk_sel_setup() local
636 parent_sel = parent_process(clocks, &parent_count, &parent_names); in clk_sel_setup()
646 init_data->parent_names = parent_names; in clk_sel_setup()
663 kfree(init_data->parent_names); in clk_sel_teardown()
[all …]

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