| /drivers/net/ethernet/samsung/sxgbe/ |
| D | sxgbe_mdio.c | 56 int phyreg, u16 phydata) in sxgbe_mdio_c45() argument
61 reg = ((phyreg >> 16) & 0x1f) << 21; in sxgbe_mdio_c45()
62 reg |= (phyaddr << 16) | (phyreg & 0xffff); in sxgbe_mdio_c45()
69 int phyreg, u16 phydata) in sxgbe_mdio_c22() argument
76 reg = (phyaddr << 16) | (phyreg & 0x1f); in sxgbe_mdio_c22()
83 int phyreg, u16 phydata) in sxgbe_mdio_access() argument
92 if (phyreg & MII_ADDR_C45) { in sxgbe_mdio_access()
93 sxgbe_mdio_c45(sp, cmd, phyaddr, phyreg, phydata); in sxgbe_mdio_access()
99 sxgbe_mdio_c22(sp, cmd, phyaddr, phyreg, phydata); in sxgbe_mdio_access()
112 static int sxgbe_mdio_read(struct mii_bus *bus, int phyaddr, int phyreg) in sxgbe_mdio_read() argument
[all …]
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| /drivers/net/ethernet/stmicro/stmmac/ |
| D | stmmac_mdio.c | 66 static int stmmac_mdio_read(struct mii_bus *bus, int phyaddr, int phyreg) in stmmac_mdio_read() argument
75 ((phyreg << 6) & (0x000007C0))); in stmmac_mdio_read()
100 static int stmmac_mdio_write(struct mii_bus *bus, int phyaddr, int phyreg, in stmmac_mdio_write() argument
109 (((phyaddr << 11) & (0x0000F800)) | ((phyreg << 6) & (0x000007C0))) in stmmac_mdio_write()
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| /drivers/net/ethernet/xircom/ |
| D | xirc2ps_cs.c | 258 static unsigned mii_rd(unsigned int ioaddr, u_char phyaddr, u_char phyreg);
259 static void mii_wr(unsigned int ioaddr, u_char phyaddr, u_char phyreg,
420 mii_rd(unsigned int ioaddr, u_char phyaddr, u_char phyreg) in mii_rd() argument
430 mii_wbits(ioaddr, phyreg, 5); /* PHY register to read */ in mii_rd()
442 mii_wr(unsigned int ioaddr, u_char phyaddr, u_char phyreg, unsigned data, in mii_wr() argument
452 mii_wbits(ioaddr, phyreg, 5); /* PHY Register to write */ in mii_wr()
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| /drivers/net/ethernet/nvidia/ |
| D | forcedeth.c | 3223 u32 phyreg, txreg; in nv_force_linkspeed() local
3233 phyreg = readl(base + NvRegSlotTime); in nv_force_linkspeed()
3234 phyreg &= ~(0x3FF00); in nv_force_linkspeed()
3236 phyreg |= NVREG_SLOTTIME_10_100_FULL; in nv_force_linkspeed()
3238 phyreg |= NVREG_SLOTTIME_10_100_FULL; in nv_force_linkspeed()
3240 phyreg |= NVREG_SLOTTIME_1000_FULL; in nv_force_linkspeed()
3241 writel(phyreg, base + NvRegSlotTime); in nv_force_linkspeed()
3244 phyreg = readl(base + NvRegPhyInterface); in nv_force_linkspeed()
3245 phyreg &= ~(PHY_HALF|PHY_100|PHY_1000); in nv_force_linkspeed()
3247 phyreg |= PHY_HALF; in nv_force_linkspeed()
[all …]
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| /drivers/staging/rtl8188eu/hal/ |
| D | phy.c | 74 struct bb_reg_def *phyreg = &hal_data->PHYRegDef[rfpath]; in rf_serial_read() local
86 tmplong2 = phy_query_bb_reg(adapt, phyreg->rfHSSIPara2, in rf_serial_read()
96 phy_set_bb_reg(adapt, phyreg->rfHSSIPara2, bMaskDWord, tmplong2); in rf_serial_read()
107 ret = phy_query_bb_reg(adapt, phyreg->rfLSSIReadBackPi, in rf_serial_read()
110 ret = phy_query_bb_reg(adapt, phyreg->rfLSSIReadBack, in rf_serial_read()
121 struct bb_reg_def *phyreg = &hal_data->PHYRegDef[rfpath]; in rf_serial_write() local
126 phy_set_bb_reg(adapt, phyreg->rf3wireOffset, bMaskDWord, data_and_addr); in rf_serial_write()
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| /drivers/net/ethernet/smsc/ |
| D | smc911x.c | 635 static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg) in smc911x_phy_read() argument
640 SMC_GET_MII(lp, phyreg, phyaddr, phydata); in smc911x_phy_read()
643 __func__, phyaddr, phyreg, phydata); in smc911x_phy_read()
651 static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg, in smc911x_phy_write() argument
657 __func__, phyaddr, phyreg, phydata); in smc911x_phy_write()
659 SMC_SET_MII(lp, phyreg, phyaddr, phydata); in smc911x_phy_write()
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| D | smc91x.c | 813 static int smc_phy_read(struct net_device *dev, int phyaddr, int phyreg) in smc_phy_read() argument
825 smc_mii_out(dev, 6 << 10 | phyaddr << 5 | phyreg, 14); in smc_phy_read()
834 __func__, phyaddr, phyreg, phydata); in smc_phy_read()
843 static void smc_phy_write(struct net_device *dev, int phyaddr, int phyreg, in smc_phy_write() argument
855 smc_mii_out(dev, 5 << 28 | phyaddr << 23 | phyreg << 18 | 2 << 16 | phydata, 32); in smc_phy_write()
861 __func__, phyaddr, phyreg, phydata); in smc_phy_write()
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| /drivers/net/ethernet/nxp/ |
| D | lpc_eth.c | 705 static int lpc_mdio_read(struct mii_bus *bus, int phy_id, int phyreg) in lpc_mdio_read() argument
711 writel(((phy_id << 8) | phyreg), LPC_ENET_MADR(pldat->net_base)); in lpc_mdio_read()
727 static int lpc_mdio_write(struct mii_bus *bus, int phy_id, int phyreg, in lpc_mdio_write() argument
733 writel(((phy_id << 8) | phyreg), LPC_ENET_MADR(pldat->net_base)); in lpc_mdio_write()
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| /drivers/net/ethernet/sgi/ |
| D | meth.c | 122 static unsigned long mdio_read(struct meth_private *priv, unsigned long phyreg) in mdio_read() argument
126 mace->eth.phy_regs = (priv->phy_addr << 5) | (phyreg & 0x1f); in mdio_read()
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| /drivers/net/ethernet/dec/tulip/ |
| D | de4x5.c | 970 static int mii_rd(u_char phyreg, u_char phyaddr, u_long ioaddr);
971 static void mii_wr(int data, u_char phyreg, u_char phyaddr, u_long ioaddr);
4816 mii_rd(u_char phyreg, u_char phyaddr, u_long ioaddr) in mii_rd() argument
4822 mii_address(phyreg, ioaddr); /* PHY Register to read */ in mii_rd()
4829 mii_wr(int data, u_char phyreg, u_char phyaddr, u_long ioaddr) in mii_wr() argument
4835 mii_address(phyreg, ioaddr); /* PHY Register to write */ in mii_wr()
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