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Searched refs:r0 (Results 1 – 25 of 50) sorted by relevance

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/drivers/gpu/drm/nouveau/core/subdev/pwr/fuc/
Dmacros.fuc194 */ mov $r0 ior /*
195 */ shl b32 $r0 6 /*
196 */ iowr I[$r0 + 0x000] reg /*
197 */ clear b32 $r0
200 */ mov $r0 ior /*
201 */ iowr I[$r0 + 0x000] reg /*
202 */ clear b32 $r0
207 */ mov $r0 ior /*
208 */ shl b32 $r0 6 /*
209 */ iowrs I[$r0 + 0x000] reg /*
[all …]
Dkernel.fuc51 // $r0 - zero
69 // $r0 - zero
99 // $r0 - zero
120 // $r0 - zero
150 ld b32 $r10 D[$r0 + #time_prev]
162 ld b32 $r10 D[$r0 + #time_next]
169 st b32 D[$r0 + #time_next] $r9
180 push $r0
181 clear b32 $r0
201 st b32 D[$r0 + #time_next] $r0
[all …]
Dmemx.fuc77 // $r0 - zero
113 st b32 D[$r0 + #memx_ts_start] $r6
121 // $r0 - zero
124 st b32 D[$r0 + #memx_ts_end] $r6
165 // $r0 - zero
203 // $r0 - zero
217 // $r0 - zero
236 // $r0 - zero
253 // $r0 - zero
267 // $r0 - zero
[all …]
Di2c_.fuc82 // $r0 - zero
205 // $r0 - zero
220 // $r0 - zero
310 // $r0 - zero
390 // $r0 - zero
Dperf.fuc47 // $r0 - zero
54 // $r0 - zero
/drivers/gpu/drm/nouveau/core/engine/crypt/fuc/
Dnv98.fuc99 // $r0 is always set to 0 in our code - this allows some space savings.
100 clear b32 $r0
107 mov $sp $r0
136 iord $r1 I[$r0 + 0x200]
145 mov $xdbase $r0
159 xdst $r0 $r2
180 xdld $r0 $r2
262 ld b32 $r7 D[$r0 + #ctx_cond_off]
283 iowr I[$r0] $r4
286 iord $r4 I[$r0 + 0x200]
[all …]
/drivers/staging/lustre/lustre/lov/
Dlov_object.c124 struct cl_object *stripe, struct lov_layout_raid0 *r0, in lov_init_sub() argument
162 r0->lo_sub[idx] = cl2lovsub(stripe); in lov_init_sub()
163 r0->lo_sub[idx]->lso_super = lov; in lov_init_sub()
164 r0->lo_sub[idx]->lso_index = idx; in lov_init_sub()
207 struct lov_layout_raid0 *r0 = &state->raid0; in lov_init_raid0() local
217 r0->lo_nr = lsm->lsm_stripe_count; in lov_init_raid0()
218 LASSERT(r0->lo_nr <= lov_targets_nr(dev)); in lov_init_raid0()
220 OBD_ALLOC_LARGE(r0->lo_sub, r0->lo_nr * sizeof(r0->lo_sub[0])); in lov_init_raid0()
221 if (r0->lo_sub != NULL) { in lov_init_raid0()
224 spin_lock_init(&r0->lo_sub_lock); in lov_init_raid0()
[all …]
Dlov_page.c161 struct lov_layout_raid0 *r0 = lov_r0(loo); in lov_page_init_raid0() local
174 LASSERT(stripe < r0->lo_nr); in lov_page_init_raid0()
188 subobj = lovsub2cl(r0->lo_sub[stripe]); in lov_page_init_raid0()
/drivers/scsi/arm/
Dacornscsi-io.S26 bic r0, r0, #3
32 ldmia r0!, {r3, r4, r5, r6}
37 ldmia r0!, {r5, r6, r7, ip}
48 ldmia r0!, {r3, r4, r5, r6}
59 ldmia r0!, {r3, r4}
67 ldr r3, [r0], #4
80 bic r0, r0, #3
93 stmia r0!, {r3, r4, r5, r6}
102 stmia r0!, {r3, r4, ip, lr}
117 stmia r0!, {r3, r4, r5, r6}
[all …]
/drivers/gpu/drm/nouveau/core/engine/graph/fuc/
Dgpc.fuc80 clear b32 $r0
95 nv_iowr(NV_PGRAPH_GPCX_GPCCS_INTR_ROUTE, 0, $r0)
110 st b32 D[$r0 + #tpc_count] $r2
111 st b32 D[$r0 + #tpc_mask] $r3
113 st b32 D[$r0 + #gpc_id] $r2
135 st b32 D[$r0 + #unk_count] $r3
136 st b32 D[$r0 + #unk_mask] $r4
150 ld b32 $r14 D[$r0 + #gpc_mmio_list_head]
151 ld b32 $r15 D[$r0 + #gpc_mmio_list_tail]
157 ld b32 $r14 D[$r0 + #tpc_mmio_list_head]
[all …]
Dhub.fuc70 clear b32 $r0
71 mov $xdbase $r0
106 sub b32 $r3 $r0 1
123 st b32 D[$r0 + #rop_count] $r1
125 st b32 D[$r0 + #gpc_count] $r15
145 ld b32 $r14 D[$r0 + #hub_mmio_list_head]
146 ld b32 $r15 D[$r0 + #hub_mmio_list_tail]
175 ld b32 $r3 D[$r0 + #gpc_count]
318 clear b32 $r0
483 mov $xtargets $r0
[all …]
/drivers/gpu/drm/nouveau/core/engine/copy/fuc/
Dnva3.fuc144 clear b32 $r0
145 mov $sp $r0
173 iord $r1 I[$r0 + 0x200]
185 iowr I[$r0 + 0x100] $r1
195 mov $xdbase $r0
236 mov b32 $r4 $r0
241 xdst $r0 $r4
244 xdld $r0 $r4
353 iowr I[$r0] $r2
355 iord $r2 I[$r0 + 0x200]
[all …]
/drivers/block/paride/
Dbpck.c64 t2(4); h = r0(); in bpck_read_regr()
167 for(i=0;i<count;i++) { t2(4); buf[i] = r0(); } in bpck_read_block()
205 o0 = r0(); in bpck_probe_unit()
221 { pi->saved_r0 = r0(); in bpck_connect()
264 { pi->saved_r0 = r0(); in bpck_force_spp()
301 for(i=0;i<TEST_LEN;i++) { t2(4); buf[i] = r0(); } in bpck_test_proto()
404 w2(0x2c); i = r0(); w0(255-i); r = r0(); w0(i); in bpck_test_port()
409 w2(0xc); i = r0(); w0(255-i); r = r0(); w0(i); in bpck_test_port()
412 if (m == 0) { w2(6); w2(0xc); r = r0(); w0(0xaa); w0(r); w0(0xaa); } in bpck_test_port()
Daten.c63 a = r0(); in aten_read_regr()
90 a = r0(); w2(0x20); b = r0(); in aten_read_block()
112 { pi->saved_r0 = r0(); in aten_connect()
Dfit3.c80 w2(0xec); w2(0xee); w2(0xef); a = r0(); in fit3_read_regr()
116 w2(0xef); a = r0(); in fit3_read_block()
117 w2(0xee); b = r0(); in fit3_read_block()
157 { pi->saved_r0 = r0(); in fit3_connect()
Dkbic.c62 a = r0(); w2(4); in kbic_read_regr()
101 { pi->saved_r0 = r0(); in k951_connect()
117 { pi->saved_r0 = r0(); in k971_connect()
167 w2(0xa0); w2(0xa1); buf[2*k] = r0(); in kbic_read_block()
168 w2(0xa5); buf[2*k+1] = r0(); in kbic_read_block()
Don26.c62 w2(0x26); a = r0(); w2(4); w2(0x26); w2(4); in on26_read_regr()
106 pi->saved_r0 = r0(); in on26_connect()
131 pi->saved_r0 = r0(); in on26_test_port()
205 w2(0x26); buf[2*k] = r0(); in on26_read_block()
206 w2(0x24); buf[2*k+1] = r0(); in on26_read_block()
Don20.c51 case 1: w2(4); w2(0x26); r = r0(); in on20_read_regr()
72 { pi->saved_r0 = r0(); in on20_connect()
95 w2(4); w2(0x26); buf[k] = r0(); in on20_read_block()
Dcomm.c58 w0(0); w2(0x26); h = r0(); w2(4); in comm_read_regr()
92 { pi->saved_r0 = r0(); in comm_connect()
124 w2(0x26); buf[i] = r0(); w2(0x24); in comm_read_block()
Ddstr.c62 case 1: w0(0); w2(0x26); a = r0(); w2(4); in dstr_read_regr()
103 { pi->saved_r0 = r0(); in dstr_connect()
134 w2(0x26); buf[k] = r0(); w2(0x24); in dstr_read_block()
Depat.c85 a = r0(); w2(4); in epat_read_regr()
132 buf[k] = r0(); in epat_read_block()
135 w2(0x26); w2(0x27); buf[count-1] = r0(); in epat_read_block()
215 { pi->saved_r0 = r0(); in epat_connect()
Dfriq.c97 buf[k] = r0(); in friq_read_block_int()
171 { pi->saved_r0 = r0(); in friq_connect()
188 pi->saved_r0 = r0(); in friq_test_proto()
/drivers/net/wireless/
Datmel.c4354 mov r0, #CPSR_INITIAL
4355 msr CPSR_c, r0 /* This is probably unnecessary */
4358 ldr r0, =SPI_CGEN_BASE
4362 str r1, [r0]
4363 ldr r1, [r0, #28]
4365 str r1, [r0, #28]
4367 str r1, [r0, #8]
4369 ldr r0, =MRBASE
4371 strh r1, [r0, #MR1]
4372 strh r1, [r0, #MR2]
[all …]
/drivers/media/tuners/
Dtda18271-maps.c908 u8 r0; member
913 { .d = 0x00, .r0 = 60, .r1 = 92 },
914 { .d = 0x01, .r0 = 62, .r1 = 94 },
915 { .d = 0x02, .r0 = 66, .r1 = 98 },
916 { .d = 0x03, .r0 = 64, .r1 = 96 },
917 { .d = 0x04, .r0 = 74, .r1 = 106 },
918 { .d = 0x05, .r0 = 72, .r1 = 104 },
919 { .d = 0x06, .r0 = 68, .r1 = 100 },
920 { .d = 0x07, .r0 = 70, .r1 = 102 },
921 { .d = 0x08, .r0 = 90, .r1 = 122 },
[all …]
/drivers/mtd/nand/
Dtmio_nand.c293 int r0, r1; in tmio_nand_correct_data() local
296 r0 = __nand_correct_data(buf, read_ecc, calc_ecc, 256); in tmio_nand_correct_data()
297 if (r0 < 0) in tmio_nand_correct_data()
298 return r0; in tmio_nand_correct_data()
302 return r0 + r1; in tmio_nand_correct_data()

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