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Searched refs:rFPGA0_XA_LSSIReadBack (Results 1 – 11 of 11) sorted by relevance

/drivers/staging/rtl8188eu/hal/
Dbb_cfg.c665 hal_data->PHYRegDef[RF_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack; in rtl88e_phy_init_bb_rf_register_definition()
/drivers/staging/rtl8192u/
Dr819xU_phyreg.h76 #define rFPGA0_XA_LSSIReadBack 0x8a0 macro
Dr819xU_phy.c690 priv->PHYRegDef[RF90_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack; in rtl8192_InitBBRFRegDef()
/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_phyreg.h93 #define rFPGA0_XA_LSSIReadBack 0x8a0 macro
Dr819xE_phyreg.h80 #define rFPGA0_XA_LSSIReadBack 0x8a0 macro
Dr8192E_phy.c489 priv->PHYRegDef[RF90_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack; in rtl8192_InitBBRFRegDef()
/drivers/staging/rtl8712/
Drtl871x_mp_phy_regdef.h127 #define rFPGA0_XA_LSSIReadBack 0x8a0 /* Tranceiver LSSI Readback */ macro
/drivers/staging/rtl8188eu/include/
Drtw_mp_phy_regdef.h152 #define rFPGA0_XA_LSSIReadBack 0x8a0 /* Tranceiver LSSI Readback */ macro
DHal8188EPhyReg.h112 #define rFPGA0_XA_LSSIReadBack 0x8a0 /* Tranceiver LSSI Readback */ macro
/drivers/staging/rtl8723au/include/
DHal8723APhyReg.h103 #define rFPGA0_XA_LSSIReadBack 0x8a0 /* Tranceiver LSSI Readback */ macro
/drivers/staging/rtl8723au/hal/
Drtl8723a_phycfg.c537 pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack; in phy_InitBBRFRegisterDefinition()