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Searched refs:rFPGA0_XD_HSSIParameter1 (Results 1 – 7 of 7) sorted by relevance

/drivers/staging/rtl8192u/
Dr819xU_phyreg.h54 #define rFPGA0_XD_HSSIParameter1 0x838 macro
Dr819xU_phy.c637 priv->PHYRegDef[RF90_PATH_D].rfHSSIPara1 = rFPGA0_XD_HSSIParameter1; in rtl8192_InitBBRFRegDef()
/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_phyreg.h71 #define rFPGA0_XD_HSSIParameter1 0x838 macro
Dr819xE_phyreg.h58 #define rFPGA0_XD_HSSIParameter1 0x838 macro
Dr8192E_phy.c447 priv->PHYRegDef[RF90_PATH_D].rfHSSIPara1 = rFPGA0_XD_HSSIParameter1; in rtl8192_InitBBRFRegDef()
/drivers/staging/rtl8712/
Drtl871x_mp_phy_regdef.h97 #define rFPGA0_XD_HSSIParameter1 0x838 macro
/drivers/staging/rtl8188eu/include/
Drtw_mp_phy_regdef.h123 #define rFPGA0_XD_HSSIParameter1 0x838 macro