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Searched refs:rd32 (Results 1 – 25 of 96) sorted by relevance

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/drivers/net/ethernet/intel/igb/
De1000_mac.c78 reg = rd32(E1000_STATUS); in igb_get_bus_info_pcie()
475 rd32(E1000_CRCERRS); in igb_clear_hw_cntrs_base()
476 rd32(E1000_SYMERRS); in igb_clear_hw_cntrs_base()
477 rd32(E1000_MPC); in igb_clear_hw_cntrs_base()
478 rd32(E1000_SCC); in igb_clear_hw_cntrs_base()
479 rd32(E1000_ECOL); in igb_clear_hw_cntrs_base()
480 rd32(E1000_MCC); in igb_clear_hw_cntrs_base()
481 rd32(E1000_LATECOL); in igb_clear_hw_cntrs_base()
482 rd32(E1000_COLC); in igb_clear_hw_cntrs_base()
483 rd32(E1000_DC); in igb_clear_hw_cntrs_base()
[all …]
De1000_82575.c91 reg = rd32(E1000_MDIC); in igb_sgmii_uses_mdio_82575()
99 reg = rd32(E1000_MDICNFG); in igb_sgmii_uses_mdio_82575()
179 ctrl_ext = rd32(E1000_CTRL_EXT); in igb_init_phy_params_82575()
215 hw->bus.func = (rd32(E1000_STATUS) & E1000_STATUS_FUNC_MASK) >> in igb_init_phy_params_82575()
316 u32 eecd = rd32(E1000_EECD); in igb_init_nvm_params_82575()
432 (rd32(E1000_FWSM) & E1000_FWSM_MODE_MASK) in igb_init_mac_params_82575()
481 ctrl_ext = rd32(E1000_CTRL_EXT); in igb_set_sfp_media_type_82575()
606 ctrl_ext = rd32(E1000_CTRL_EXT); in igb_get_invariants_82575()
834 mdic = rd32(E1000_MDIC); in igb_get_phy_id_82575()
843 mdic = rd32(E1000_MDICNFG); in igb_get_phy_id_82575()
[all …]
Digb_ethtool.c146 status = rd32(E1000_STATUS); in igb_get_settings()
462 regs_buff[0] = rd32(E1000_CTRL); in igb_get_regs()
463 regs_buff[1] = rd32(E1000_STATUS); in igb_get_regs()
464 regs_buff[2] = rd32(E1000_CTRL_EXT); in igb_get_regs()
465 regs_buff[3] = rd32(E1000_MDIC); in igb_get_regs()
466 regs_buff[4] = rd32(E1000_SCTL); in igb_get_regs()
467 regs_buff[5] = rd32(E1000_CONNSW); in igb_get_regs()
468 regs_buff[6] = rd32(E1000_VET); in igb_get_regs()
469 regs_buff[7] = rd32(E1000_LEDCTL); in igb_get_regs()
470 regs_buff[8] = rd32(E1000_PBA); in igb_get_regs()
[all …]
Digb_ptp.c87 lo = rd32(E1000_SYSTIML); in igb_ptp_read_82576()
88 hi = rd32(E1000_SYSTIMH); in igb_ptp_read_82576()
108 rd32(E1000_SYSTIMR); in igb_ptp_read_82580()
109 lo = rd32(E1000_SYSTIML); in igb_ptp_read_82580()
110 hi = rd32(E1000_SYSTIMH); in igb_ptp_read_82580()
128 rd32(E1000_SYSTIMR); in igb_ptp_read_i210()
129 nsec = rd32(E1000_SYSTIML); in igb_ptp_read_i210()
130 sec = rd32(E1000_SYSTIMH); in igb_ptp_read_i210()
396 tsynctxctl = rd32(E1000_TSYNCTXCTL); in igb_ptp_tx_work()
430 u32 tsyncrxctl = rd32(E1000_TSYNCRXCTL); in igb_ptp_rx_hang()
[all …]
Digb_main.c307 regs[n] = rd32(E1000_RDLEN(n)); in igb_regdump()
311 regs[n] = rd32(E1000_RDH(n)); in igb_regdump()
315 regs[n] = rd32(E1000_RDT(n)); in igb_regdump()
319 regs[n] = rd32(E1000_RXDCTL(n)); in igb_regdump()
323 regs[n] = rd32(E1000_RDBAL(n)); in igb_regdump()
327 regs[n] = rd32(E1000_RDBAH(n)); in igb_regdump()
331 regs[n] = rd32(E1000_RDBAL(n)); in igb_regdump()
335 regs[n] = rd32(E1000_TDBAH(n)); in igb_regdump()
339 regs[n] = rd32(E1000_TDLEN(n)); in igb_regdump()
343 regs[n] = rd32(E1000_TDH(n)); in igb_regdump()
[all …]
De1000_i210.c50 swsm = rd32(E1000_SWSM); in igb_get_hw_semaphore_i210()
66 swsm = rd32(E1000_SWSM); in igb_get_hw_semaphore_i210()
83 swsm = rd32(E1000_SWSM); in igb_get_hw_semaphore_i210()
87 if (rd32(E1000_SWSM) & E1000_SWSM_SWESMBI) in igb_get_hw_semaphore_i210()
151 swfw_sync = rd32(E1000_SW_FW_SYNC); in igb_acquire_swfw_sync_i210()
190 swfw_sync = rd32(E1000_SW_FW_SYNC); in igb_release_swfw_sync_i210()
274 rd32(E1000_SRWR)) { in igb_write_nvm_srwr()
352 invm_dword = rd32(E1000_INVM_DATA_REG(i)); in igb_read_invm_word_i210()
477 invm_dword = rd32(E1000_INVM_DATA_REG(i)); in igb_read_invm_version()
653 reg = rd32(E1000_EECD); in igb_pool_flash_update_done_i210()
[all …]
De1000_nvm.c72 u32 eecd = rd32(E1000_EECD); in igb_shift_out_eec_bits()
117 eecd = rd32(E1000_EECD); in igb_shift_in_eec_bits()
126 eecd = rd32(E1000_EECD); in igb_shift_in_eec_bits()
154 reg = rd32(E1000_EERD); in igb_poll_eerd_eewr_done()
156 reg = rd32(E1000_EEWR); in igb_poll_eerd_eewr_done()
179 u32 eecd = rd32(E1000_EECD); in igb_acquire_nvm()
185 eecd = rd32(E1000_EECD); in igb_acquire_nvm()
191 eecd = rd32(E1000_EECD); in igb_acquire_nvm()
214 u32 eecd = rd32(E1000_EECD); in igb_standby_nvm()
239 eecd = rd32(E1000_EECD); in e1000_stop_nvm()
[all …]
/drivers/net/ethernet/intel/i40e/
Di40e_ptp.c67 lo = rd32(hw, I40E_PRTTSYN_TIME_L); in i40e_ptp_read()
68 hi = rd32(hw, I40E_PRTTSYN_TIME_H); in i40e_ptp_read()
253 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_1); in i40e_ptp_rx_hang()
281 rd32(hw, I40E_PRTTSYN_RXTIME_H(0)); in i40e_ptp_rx_hang()
282 rd32(hw, I40E_PRTTSYN_RXTIME_H(1)); in i40e_ptp_rx_hang()
283 rd32(hw, I40E_PRTTSYN_RXTIME_H(2)); in i40e_ptp_rx_hang()
284 rd32(hw, I40E_PRTTSYN_RXTIME_H(3)); in i40e_ptp_rx_hang()
308 lo = rd32(hw, I40E_PRTTSYN_TXTIME_L); in i40e_ptp_tx_hwtstamp()
309 hi = rd32(hw, I40E_PRTTSYN_TXTIME_H); in i40e_ptp_tx_hwtstamp()
346 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_1); in i40e_ptp_rx_hwtstamp()
[all …]
Di40e_diag.c43 orig_val = rd32(hw, reg); in i40e_diag_reg_pattern_test()
47 val = rd32(hw, reg); in i40e_diag_reg_pattern_test()
57 val = rd32(hw, reg); in i40e_diag_reg_pattern_test()
Di40e_nvm.c49 gens = rd32(hw, I40E_GLNVM_GENS); in i40e_init_nvm()
56 fla = rd32(hw, I40E_GLNVM_FLA); in i40e_init_nvm()
91 gtime = rd32(hw, I40E_GLVFGEN_TIMER); in i40e_acquire_nvm()
115 gtime = rd32(hw, I40E_GLVFGEN_TIMER); in i40e_acquire_nvm()
155 srctl = rd32(hw, I40E_GLNVM_SRCTL); in i40e_poll_sr_srctl_done_bit()
198 sr_reg = rd32(hw, I40E_GLNVM_SRDATA); in i40e_read_nvm_word()
/drivers/gpu/drm/nouveau/core/engine/copy/
Dnvc0.c64 .rd32 = _nouveau_falcon_context_rd32,
156 .rd32 = _nouveau_falcon_rd32,
169 .rd32 = _nouveau_falcon_rd32,
Dnva3.c64 .rd32 = _nouveau_falcon_context_rd32,
153 .rd32 = _nouveau_falcon_rd32,
/drivers/gpu/drm/nouveau/core/engine/bsp/
Dnv84.c50 .rd32 = _nouveau_engctx_rd32,
89 .rd32 = _nouveau_xtensa_rd32,
Dnvc0.c54 .rd32 = _nouveau_falcon_context_rd32,
107 .rd32 = _nouveau_falcon_rd32,
Dnv98.c56 .rd32 = _nouveau_falcon_context_rd32,
108 .rd32 = _nouveau_falcon_rd32,
Dnve0.c54 .rd32 = _nouveau_falcon_context_rd32,
107 .rd32 = _nouveau_falcon_rd32,
/drivers/gpu/drm/nouveau/core/engine/vp/
Dnv84.c50 .rd32 = _nouveau_engctx_rd32,
89 .rd32 = _nouveau_xtensa_rd32,
Dnv98.c55 .rd32 = _nouveau_falcon_context_rd32,
107 .rd32 = _nouveau_falcon_rd32,
Dnvc0.c54 .rd32 = _nouveau_falcon_context_rd32,
107 .rd32 = _nouveau_falcon_rd32,
Dnve0.c54 .rd32 = _nouveau_falcon_context_rd32,
107 .rd32 = _nouveau_falcon_rd32,
/drivers/gpu/drm/nouveau/core/engine/ppp/
Dnv98.c55 .rd32 = _nouveau_falcon_context_rd32,
107 .rd32 = _nouveau_falcon_rd32,
Dnvc0.c54 .rd32 = _nouveau_falcon_context_rd32,
107 .rd32 = _nouveau_falcon_rd32,
/drivers/net/ethernet/intel/i40evf/
Di40evf_main.c191 rd32(hw, I40E_VFGEN_RSTAT); in i40evf_misc_irq_disable()
208 rd32(hw, I40E_VFGEN_RSTAT); in i40evf_misc_irq_enable()
228 rd32(hw, I40E_VFGEN_RSTAT); in i40evf_irq_disable()
264 dyn_ctl = rd32(hw, I40E_VFINT_DYN_CTL01); in i40evf_fire_sw_int()
271 dyn_ctl = rd32(hw, I40E_VFINT_DYN_CTLN1(i - 1)); in i40evf_fire_sw_int()
291 rd32(hw, I40E_VFGEN_RSTAT); in i40evf_irq_enable()
308 val = rd32(hw, I40E_VFINT_ICR01); in i40evf_msix_aq()
309 ena_mask = rd32(hw, I40E_VFINT_ICR0_ENA1); in i40evf_msix_aq()
312 val = rd32(hw, I40E_VFINT_DYN_CTL01); in i40evf_msix_aq()
1307 rstat_val = rd32(hw, I40E_VFGEN_RSTAT) & in i40evf_watchdog_task()
[all …]
Di40evf_ethtool.c371 u64 hena = (u64)rd32(hw, I40E_VFQF_HENA(0)) | in i40evf_get_rss_hash_opts()
372 ((u64)rd32(hw, I40E_VFQF_HENA(1)) << 32); in i40evf_get_rss_hash_opts()
458 u64 hena = (u64)rd32(hw, I40E_VFQF_HENA(0)) | in i40evf_set_rss_hash_opt()
459 ((u64)rd32(hw, I40E_VFQF_HENA(1)) << 32); in i40evf_set_rss_hash_opt()
636 hlut_val = rd32(hw, I40E_VFQF_HLUT(i)); in i40evf_get_rxfh()
/drivers/gpu/drm/nouveau/core/engine/crypt/
Dnv98.c65 .rd32 = _nouveau_falcon_context_rd32,
153 .rd32 = _nouveau_falcon_rd32,

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