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Searched refs:read_pll (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/nouveau/core/subdev/clock/
Dnv50.c154 read_pll(struct nv50_clock_priv *priv, u32 base) in read_pll() function
219 case 0x00000002: return read_pll(priv, 0x004020) >> P; in nv50_clock_read()
220 case 0x00000003: return read_pll(priv, 0x004028) >> P; in nv50_clock_read()
231 case 0x00000020: return read_pll(priv, 0x004028) >> P; in nv50_clock_read()
232 case 0x00000030: return read_pll(priv, 0x004020) >> P; in nv50_clock_read()
246 return read_pll(priv, 0x004008) >> P; in nv50_clock_read()
267 return read_pll(priv, 0x004028) >> P; in nv50_clock_read()
268 return read_pll(priv, 0x004030) >> P; in nv50_clock_read()
291 return read_pll(priv, 0x00e810) >> 2; in nv50_clock_read()
395 out = read_pll(priv, 0x004030); in nv50_clock_calc()
Dnve0.c47 static u32 read_pll(struct nve0_clock_priv *, u32);
54 return read_pll(priv, 0x00e800); in read_vco()
55 return read_pll(priv, 0x00e820); in read_vco()
59 read_pll(struct nve0_clock_priv *priv, u32 pll) in read_pll() function
79 sclk = read_pll(priv, 0x132020); in read_pll()
133 case 1: return read_pll(priv, 0x132020); in read_mem()
134 case 2: return read_pll(priv, 0x132000); in read_mem()
149 sclk = read_pll(priv, 0x137000 + (clk * 0x20)); in read_clk()
161 sclk = read_pll(priv, 0x1370e0); in read_clk()
Dnvc0.c59 read_pll(struct nvc0_clock_priv *priv, u32 pll) in read_pll() function
132 sclk = read_pll(priv, 0x137000 + (clk * 0x20)); in read_clk()
134 sclk = read_pll(priv, 0x1370e0); in read_clk()
159 return read_pll(priv, 0x00e800); in nvc0_clock_read()
161 return read_pll(priv, 0x00e820); in nvc0_clock_read()
166 return read_pll(priv, 0x132020); in nvc0_clock_read()
168 return read_pll(priv, 0x132000); in nvc0_clock_read()
Dnva3.c41 static u32 read_pll(struct nva3_clock_priv *, int, u32);
52 return read_pll(priv, 0x41, 0x00e820); in read_vco()
54 return read_pll(priv, 0x42, 0x00e8a0); in read_vco()
107 read_pll(struct nva3_clock_priv *priv, int clk, u32 pll) in read_pll() function
147 return read_pll(priv, 0x00, 0x4200); in nva3_clock_read()
149 return read_pll(priv, 0x01, 0x4220); in nva3_clock_read()
151 return read_pll(priv, 0x02, 0x4000); in nva3_clock_read()
Dnvaa.c50 read_pll(struct nouveau_clock *clk, u32 base) in read_pll() function
111 case 0x00000003: return read_pll(clk, 0x004028) >> P; in nvaa_clock_read()
135 case 0x00000020: return read_pll(clk, 0x004028) >> P; in nvaa_clock_read()
136 case 0x00000030: return read_pll(clk, 0x004020) >> P; in nvaa_clock_read()