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Searched refs:ref_freq (Results 1 – 16 of 16) sorted by relevance

/drivers/cpufreq/
Dat32ap-cpufreq.c26 static unsigned int ref_freq; variable
36 if (!ref_freq) { in at32_set_target()
37 ref_freq = old_freq; in at32_set_target()
43 loops_per_jiffy_ref, ref_freq, new_freq); in at32_set_target()
47 loops_per_jiffy_ref, ref_freq, new_freq); in at32_set_target()
/drivers/video/fbdev/via/
Dvia_clock.h62 static inline u32 get_pll_internal_frequency(u32 ref_freq, in get_pll_internal_frequency() argument
65 return ref_freq / pll.divisor * pll.multiplier; in get_pll_internal_frequency()
68 static inline u32 get_pll_output_frequency(u32 ref_freq, in get_pll_output_frequency() argument
71 return get_pll_internal_frequency(ref_freq, pll) >> pll.rshift; in get_pll_output_frequency()
/drivers/net/wireless/ti/wl1251/
Dboot.c74 u32 scr_pad6, init_data, tmp, elp_cmd, ref_freq; in wl1251_boot_init_seq() local
102 ref_freq = scr_pad6 & 0x000000FF; in wl1251_boot_init_seq()
103 wl1251_debug(DEBUG_BOOT, "ref_freq 0x%x", ref_freq); in wl1251_boot_init_seq()
157 tmp = LUT[ref_freq][LUT_PARAM_INTEGER_DIVIDER] | 0x00017000; in wl1251_boot_init_seq()
163 tmp = LUT[ref_freq][LUT_PARAM_FRACTIONAL_DIVIDER]; in wl1251_boot_init_seq()
174 tmp = (LUT[ref_freq][LUT_PARAM_ATTN_BB] << 16) | in wl1251_boot_init_seq()
175 (LUT[ref_freq][LUT_PARAM_ALPHA_BB] << 12) | 0x1; in wl1251_boot_init_seq()
182 tmp = LUT[ref_freq][LUT_PARAM_STOP_TIME_BB] | 0x000A0000; in wl1251_boot_init_seq()
190 tmp = LUT[ref_freq][LUT_PARAM_BB_PLL_LOOP_FILTER] | 0x00000030; in wl1251_boot_init_seq()
/drivers/clk/
Dclk-highbank.c121 static void clk_pll_calc(unsigned long rate, unsigned long ref_freq, in clk_pll_calc() argument
138 divf = (vco_freq + (ref_freq / 2)) / ref_freq; in clk_pll_calc()
149 unsigned long ref_freq = *parent_rate; in clk_pll_round_rate() local
151 clk_pll_calc(rate, ref_freq, &divq, &divf); in clk_pll_round_rate()
153 return (ref_freq * (divf + 1)) / (1 << divq); in clk_pll_round_rate()
/drivers/video/fbdev/matrox/
Dmatroxfb_misc.c132 unsigned int fxtal = pll->ref_freq; in matroxfb_PLL_calcclock()
142 printk(KERN_ERR "ref_freq: %d\n", pll->ref_freq); in matroxfb_PLL_calcclock()
546 minfo->features.pll.ref_freq = 14318; in parse_pins1()
556 minfo->features.pll.ref_freq = 14318; in default_pins1()
570 minfo->features.pll.ref_freq = 14318; in parse_pins2()
581 minfo->features.pll.ref_freq = 14318; in default_pins2()
598 minfo->features.pll.ref_freq = (bd->pins[52] & 0x20) ? 14318 : 27000; in parse_pins3()
611 minfo->features.pll.ref_freq = 27000; in default_pins3()
629 minfo->features.pll.ref_freq = (bd->pins[ 92] & 0x01) ? 14318 : 27000; in parse_pins4()
643 minfo->features.pll.ref_freq = 27000; in default_pins4()
[all …]
Dg450_pll.c35 return (minfo->features.pll.ref_freq * n + (m >> 1)) / m; in g450_mnp2vco()
99 n = ((tvco * (m+1) + minfo->features.pll.ref_freq) / (minfo->features.pll.ref_freq * 2)) - 2; in g450_nextpll()
Dmatroxfb_maven.c199 unsigned int ref_freq; member
214 .ref_freq = 540000,
219 .ref_freq = 450450, /* 27027000/60 == 27000000/59.94005994 */
229 unsigned int fxtal = ctl->ref_freq; in matroxfb_PLL_mavenclock()
Dmatroxfb_DAC1064.c180 } else if (minfo->crtc2.pixclock == minfo->features.pll.ref_freq) { in g450_set_plls()
589 minfo->features.pll.ref_freq = 14318; in MGA1064_ramdac_init()
857 if (!minfo->features.pll.ref_freq) { in MGAG100_preinit()
858 minfo->features.pll.ref_freq = 27000; in MGAG100_preinit()
Dmatroxfb_base.h242 unsigned int ref_freq; member
Dmatroxfb_Ti3026.c546 minfo->features.pll.ref_freq = 114545; in ti3026_ramdac_init()
/drivers/video/fbdev/
Dsmscufx.c508 static u32 ufx_calc_range(u32 ref_freq) in ufx_calc_range() argument
510 if (ref_freq >= 88000000) in ufx_calc_range()
513 if (ref_freq >= 54000000) in ufx_calc_range()
516 if (ref_freq >= 34000000) in ufx_calc_range()
519 if (ref_freq >= 21000000) in ufx_calc_range()
522 if (ref_freq >= 13000000) in ufx_calc_range()
525 if (ref_freq >= 8000000) in ufx_calc_range()
/drivers/video/fbdev/aty/
Datyfb.h60 u16 ref_freq; member
Datyfb_base.c3415 pll_block.ref_freq, pll_block.ref_divider); in init_from_bios()
3422 par->pll_limits.ref_clk = pll_block.ref_freq/100; in init_from_bios()
/drivers/gpu/drm/radeon/
Dradeon_uvd.c921 unsigned vco_freq, ref_freq = rdev->clock.spll.reference_freq; in radeon_uvd_calc_upll_dividers() local
933 do_div(fb_div, ref_freq); in radeon_uvd_calc_upll_dividers()
Dradeon_legacy_crtc.c262 static uint8_t radeon_compute_pll_gain(uint16_t ref_freq, uint16_t ref_div, in radeon_compute_pll_gain() argument
270 vcoFreq = ((unsigned)ref_freq * fb_div) / ref_div; in radeon_compute_pll_gain()
Drv6xx_dpm.c534 static inline u32 rv6xx_calculate_spread_spectrum_clk_v(u32 vco_freq, u32 ref_freq, in rv6xx_calculate_spread_spectrum_clk_v() argument
538 u32 fb_divider = vco_freq / ref_freq; in rv6xx_calculate_spread_spectrum_clk_v()
544 static inline u32 rv6xx_calculate_spread_spectrum_clk_s(u32 ss_rate, u32 ref_freq) in rv6xx_calculate_spread_spectrum_clk_s() argument
546 return (((ref_freq * 10) / (ss_rate * 2)) - 1) / 4; in rv6xx_calculate_spread_spectrum_clk_s()