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Searched refs:regbase (Results 1 – 25 of 31) sorted by relevance

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/drivers/video/fbdev/
Dwmt_ge_rops.c47 static void __iomem *regbase; variable
68 (p->var.bits_per_pixel == 8 ? 0 : 1), regbase + GE_DEPTH_OFF); in wmt_ge_fillrect()
69 writel(p->var.bits_per_pixel == 15 ? 1 : 0, regbase + GE_HIGHCOLOR_OFF); in wmt_ge_fillrect()
70 writel(p->fix.smem_start, regbase + GE_DESTBASE_OFF); in wmt_ge_fillrect()
71 writel(p->var.xres_virtual - 1, regbase + GE_DESTDISPW_OFF); in wmt_ge_fillrect()
72 writel(p->var.yres_virtual - 1, regbase + GE_DESTDISPH_OFF); in wmt_ge_fillrect()
73 writel(rect->dx, regbase + GE_DESTAREAX_OFF); in wmt_ge_fillrect()
74 writel(rect->dy, regbase + GE_DESTAREAY_OFF); in wmt_ge_fillrect()
75 writel(rect->width - 1, regbase + GE_DESTAREAW_OFF); in wmt_ge_fillrect()
76 writel(rect->height - 1, regbase + GE_DESTAREAH_OFF); in wmt_ge_fillrect()
[all …]
Dcirrusfb.c356 u8 __iomem *regbase; member
396 static void cirrusfb_WaitBLT(u8 __iomem *regbase);
397 static void cirrusfb_BitBLT(u8 __iomem *regbase, int bits_per_pixel,
402 static void cirrusfb_RectFill(u8 __iomem *regbase, int bits_per_pixel,
411 static void cirrusfb_dbg_reg_dump(struct fb_info *info, caddr_t regbase);
413 caddr_t regbase,
452 long mclk = vga_rseq(cinfo->regbase, CL_SEQR1F) & 0x3f; in cirrusfb_check_mclk()
638 old1f = vga_rseq(cinfo->regbase, CL_SEQR1F) & ~0x40; in cirrusfb_set_mclk_as_source()
644 old1e = vga_rseq(cinfo->regbase, CL_SEQR1E) & ~0x1; in cirrusfb_set_mclk_as_source()
648 vga_wseq(cinfo->regbase, CL_SEQR1E, old1e); in cirrusfb_set_mclk_as_source()
[all …]
Dwm8505fb.c46 void __iomem *regbase; member
59 writel(0, fbi->regbase + i); in wm8505fb_init_hw()
62 writel(fbi->fb.fix.smem_start, fbi->regbase + WMT_GOVR_FBADDR); in wm8505fb_init_hw()
63 writel(fbi->fb.fix.smem_start, fbi->regbase + WMT_GOVR_FBADDR1); in wm8505fb_init_hw()
70 writel(0x31c, fbi->regbase + WMT_GOVR_COLORSPACE); in wm8505fb_init_hw()
71 writel(1, fbi->regbase + WMT_GOVR_COLORSPACE1); in wm8505fb_init_hw()
74 writel(info->var.xres, fbi->regbase + WMT_GOVR_XRES); in wm8505fb_init_hw()
75 writel(info->var.xres_virtual, fbi->regbase + WMT_GOVR_XRES_VIRTUAL); in wm8505fb_init_hw()
78 writel(0xf, fbi->regbase + WMT_GOVR_FHI); in wm8505fb_init_hw()
79 writel(4, fbi->regbase + WMT_GOVR_DVO_SET); in wm8505fb_init_hw()
[all …]
Dvt8500lcdfb.c122 control0 = readl(fbi->regbase) & ~0xf; in vt8500lcd_set_par()
123 writel(0, fbi->regbase); in vt8500lcd_set_par()
124 while (readl(fbi->regbase + 0x38) & 0x10) in vt8500lcd_set_par()
129 | (info->var.right_margin & 0xff), fbi->regbase + 0x4); in vt8500lcd_set_par()
133 | (info->var.lower_margin & 0xff), fbi->regbase + 0x8); in vt8500lcd_set_par()
135 | ((info->var.xres - 1) & 0x400), fbi->regbase + 0x10); in vt8500lcd_set_par()
136 writel(0x80000000, fbi->regbase + 0x20); in vt8500lcd_set_par()
137 writel(control0 | (reg_bpp << 1) | 0x100, fbi->regbase); in vt8500lcd_set_par()
196 writel(0xffffffff ^ (1 << 3), fbi->regbase + 0x3c); in vt8500lcd_ioctl()
198 readl(fbi->regbase + 0x38) & (1 << 3), HZ / 10); in vt8500lcd_ioctl()
[all …]
Dvt8500lcdfb.h18 void __iomem *regbase; member
/drivers/video/fbdev/core/
Dsvgalib.c23 void svga_wcrt_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value) in svga_wcrt_multi() argument
28 regval = vga_rcrt(regbase, regset->regnum); in svga_wcrt_multi()
37 vga_wcrt(regbase, regset->regnum, regval); in svga_wcrt_multi()
43 void svga_wseq_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value) in svga_wseq_multi() argument
48 regval = vga_rseq(regbase, regset->regnum); in svga_wseq_multi()
57 vga_wseq(regbase, regset->regnum, regval); in svga_wseq_multi()
78 void svga_set_default_gfx_regs(void __iomem *regbase) in svga_set_default_gfx_regs() argument
81 vga_wgfx(regbase, VGA_GFX_SR_VALUE, 0x00); in svga_set_default_gfx_regs()
82 vga_wgfx(regbase, VGA_GFX_SR_ENABLE, 0x00); in svga_set_default_gfx_regs()
83 vga_wgfx(regbase, VGA_GFX_COMPARE_VALUE, 0x00); in svga_set_default_gfx_regs()
[all …]
/drivers/staging/comedi/drivers/
D8255.c83 unsigned long regbase; member
88 int dir, int port, int data, unsigned long regbase) in subdev_8255_io() argument
91 outb(data, dev->iobase + regbase + port); in subdev_8255_io()
94 return inb(dev->iobase + regbase + port); in subdev_8255_io()
98 int dir, int port, int data, unsigned long regbase) in subdev_8255_mmio() argument
101 writeb(data, dev->mmio + regbase + port); in subdev_8255_mmio()
104 return readb(dev->mmio + regbase + port); in subdev_8255_mmio()
113 unsigned long regbase = spriv->regbase; in subdev_8255_insn() local
121 s->state & 0xff, regbase); in subdev_8255_insn()
124 (s->state >> 8) & 0xff, regbase); in subdev_8255_insn()
[all …]
D8255.h41 unsigned long regbase);
46 unsigned long regbase);
/drivers/clocksource/
Dvt8500_timer.c53 static void __iomem *regbase; variable
58 writel(3, regbase + TIMER_CTRL_VAL); in vt8500_timer_read()
59 while ((readl((regbase + TIMER_AS_VAL)) & TIMER_COUNT_R_ACTIVE) in vt8500_timer_read()
62 return readl(regbase + TIMER_COUNT_VAL); in vt8500_timer_read()
78 while ((readl(regbase + TIMER_AS_VAL) & TIMER_MATCH_W_ACTIVE) in vt8500_timer_set_next_event()
81 writel((unsigned long)alarm, regbase + TIMER_MATCH_VAL); in vt8500_timer_set_next_event()
86 writel(1, regbase + TIMER_IER_VAL); in vt8500_timer_set_next_event()
101 writel(readl(regbase + TIMER_CTRL_VAL) | 1, in vt8500_timer_set_mode()
102 regbase + TIMER_CTRL_VAL); in vt8500_timer_set_mode()
103 writel(0, regbase + TIMER_IER_VAL); in vt8500_timer_set_mode()
[all …]
/drivers/rtc/
Drtc-sh.c92 void __iomem *regbase; member
109 tmp = readb(rtc->regbase + RCR1); in __sh_rtc_interrupt()
112 writeb(tmp, rtc->regbase + RCR1); in __sh_rtc_interrupt()
125 tmp = readb(rtc->regbase + RCR1); in __sh_rtc_alarm()
128 writeb(tmp, rtc->regbase + RCR1); in __sh_rtc_alarm()
142 tmp = readb(rtc->regbase + RCR2); in __sh_rtc_periodic()
145 writeb(tmp, rtc->regbase + RCR2); in __sh_rtc_periodic()
226 tmp = readb(rtc->regbase + RCR2); in sh_rtc_irq_set_state()
237 writeb(tmp, rtc->regbase + RCR2); in sh_rtc_irq_set_state()
301 tmp = readb(rtc->regbase + RCR1); in sh_rtc_setaie()
[all …]
Drtc-vt8500.c81 void __iomem *regbase; member
96 isr = readl(vt8500_rtc->regbase + VT8500_RTC_IS); in vt8500_rtc_irq()
97 writel(isr, vt8500_rtc->regbase + VT8500_RTC_IS); in vt8500_rtc_irq()
114 date = readl(vt8500_rtc->regbase + VT8500_RTC_DR); in vt8500_rtc_read_time()
115 time = readl(vt8500_rtc->regbase + VT8500_RTC_TR); in vt8500_rtc_read_time()
143 vt8500_rtc->regbase + VT8500_RTC_DS); in vt8500_rtc_set_time()
148 vt8500_rtc->regbase + VT8500_RTC_TS); in vt8500_rtc_set_time()
158 alarm = readl(vt8500_rtc->regbase + VT8500_RTC_AS); in vt8500_rtc_read_alarm()
159 isr = readl(vt8500_rtc->regbase + VT8500_RTC_IS); in vt8500_rtc_read_alarm()
181 vt8500_rtc->regbase + VT8500_RTC_AS); in vt8500_rtc_set_alarm()
[all …]
/drivers/gpio/
Dgpio-pxa.c72 void __iomem *regbase; member
148 return container_of(c, struct pxa_gpio_chip, chip)->regbase; in gpio_chip_base()
310 chips[i].regbase = gpio_reg_base + BANK_OFF(i); in pxa_init_gpio_chip()
342 grer = readl_relaxed(c->regbase + GRER_OFFSET) & ~c->irq_mask; in update_edge_detect()
343 gfer = readl_relaxed(c->regbase + GFER_OFFSET) & ~c->irq_mask; in update_edge_detect()
346 writel_relaxed(grer, c->regbase + GRER_OFFSET); in update_edge_detect()
347 writel_relaxed(gfer, c->regbase + GFER_OFFSET); in update_edge_detect()
371 gpdr = readl_relaxed(c->regbase + GPDR_OFFSET); in pxa_gpio_irq_type()
374 writel_relaxed(gpdr | mask, c->regbase + GPDR_OFFSET); in pxa_gpio_irq_type()
376 writel_relaxed(gpdr & ~mask, c->regbase + GPDR_OFFSET); in pxa_gpio_irq_type()
[all …]
Dgpio-f7188x.c52 unsigned int regbase; member
140 .regbase = _regbase, \
181 dir = superio_inb(sio->addr, gpio_dir(bank->regbase)); in f7188x_gpio_direction_in()
183 superio_outb(sio->addr, gpio_dir(bank->regbase), dir); in f7188x_gpio_direction_in()
203 dir = superio_inb(sio->addr, gpio_dir(bank->regbase)); in f7188x_gpio_get()
206 data = superio_inb(sio->addr, gpio_data_out(bank->regbase)); in f7188x_gpio_get()
208 data = superio_inb(sio->addr, gpio_data_in(bank->regbase)); in f7188x_gpio_get()
229 data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase)); in f7188x_gpio_direction_out()
234 superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out); in f7188x_gpio_direction_out()
236 dir = superio_inb(sio->addr, gpio_dir(bank->regbase)); in f7188x_gpio_direction_out()
[all …]
/drivers/ide/
Dau1xxx-ide.c325 u32 devwidth, u32 flags, u32 regbase) in auide_init_dbdma_dev() argument
328 dev->dev_physaddr = CPHYSADDR(regbase); in auide_init_dbdma_dev()
365 DEV_FLAGS_OUT | flags, auide->regbase); in auide_ddma_init()
369 DEV_FLAGS_IN | flags, auide->regbase); in auide_ddma_init()
374 devwidth, DEV_FLAGS_ANYUSE, auide->regbase); in auide_ddma_init()
417 DEV_FLAGS_OUT | flags, auide->regbase); in auide_ddma_init()
421 DEV_FLAGS_IN | flags, auide->regbase); in auide_ddma_init()
455 *ata_regs++ = ahwif->regbase + (i << IDE_REG_SHIFT); in auide_setup_ports()
458 *ata_regs = ahwif->regbase + (14 << IDE_REG_SHIFT); in auide_setup_ports()
537 ahwif->regbase = (u32)ioremap(res->start, resource_size(res)); in au_ide_probe()
[all …]
Dpmac.c57 unsigned long regbase; member
1138 unsigned long regbase; in pmac_ide_macio_attach() local
1175 regbase = (unsigned long) base; in pmac_ide_macio_attach()
1179 pmif->regbase = regbase; in pmac_ide_macio_attach()
1196 pmac_ide_init_ports(&hw, pmif->regbase); in pmac_ide_macio_attach()
1297 pmif->regbase = (unsigned long) base + 0x2000; in pmac_ide_pci_attach()
1305 pmac_ide_init_ports(&hw, pmif->regbase); in pmac_ide_pci_attach()
/drivers/clk/at91/
Dpmc.c193 void __iomem *regbase, int virq, in at91_pmc_init() argument
198 if (!regbase || !virq || !caps) in at91_pmc_init()
201 at91_pmc_base = regbase; in at91_pmc_init()
208 pmc->regbase = regbase; in at91_pmc_init()
356 void __iomem *regbase = of_iomap(np, 0); in of_at91_pmc_setup() local
359 if (!regbase) in of_at91_pmc_setup()
366 pmc = at91_pmc_init(np, regbase, virq, caps); in of_at91_pmc_setup()
Dsckc.c43 void __iomem *regbase = of_iomap(np, 0); in of_at91sam9x5_sckc_setup() local
45 if (!regbase) in of_at91sam9x5_sckc_setup()
53 clk_setup(childnp, regbase); in of_at91sam9x5_sckc_setup()
Dpmc.h31 void __iomem *regbase; member
50 return readl(pmc->regbase + offset); in pmc_read()
55 writel(value, pmc->regbase + offset); in pmc_write()
/drivers/pinctrl/
Dpinctrl-at91.c45 void __iomem *regbase; /* PIO bank virtual address */ member
325 return gpio_chips[bank]->regbase; in pin_to_controller()
818 writel_relaxed(mask, at91_chip->regbase + PIO_PER); in at91_gpio_request_enable()
1296 void __iomem *pio = at91_gpio->regbase; in at91_gpio_get_direction()
1307 void __iomem *pio = at91_gpio->regbase; in at91_gpio_direction_input()
1317 void __iomem *pio = at91_gpio->regbase; in at91_gpio_get()
1329 void __iomem *pio = at91_gpio->regbase; in at91_gpio_set()
1339 void __iomem *pio = at91_gpio->regbase; in at91_gpio_direction_output()
1354 void __iomem *pio = at91_gpio->regbase; in at91_gpio_dbg_show()
1400 void __iomem *pio = at91_gpio->regbase; in gpio_irq_mask()
[all …]
/drivers/iommu/
Domap-iommu.h31 void __iomem *regbase; member
221 return __raw_readl(obj->regbase + offs); in iommu_read_reg()
226 __raw_writel(val, obj->regbase + offs); in iommu_write_reg()
/drivers/video/
Dvgastate.c34 static inline unsigned char vga_rcrtcs(void __iomem *regbase, unsigned short iobase, in vga_rcrtcs() argument
37 vga_w(regbase, iobase + 0x4, reg); in vga_rcrtcs()
38 return vga_r(regbase, iobase + 0x5); in vga_rcrtcs()
41 static inline void vga_wcrtcs(void __iomem *regbase, unsigned short iobase, in vga_wcrtcs() argument
44 vga_w(regbase, iobase + 0x4, reg); in vga_wcrtcs()
45 vga_w(regbase, iobase + 0x5, val); in vga_wcrtcs()
/drivers/macintosh/
Dmediabay.c563 u32 __iomem *regbase; in media_bay_attach() local
579 regbase = (u32 __iomem *)ioremap(base, 0x100); in media_bay_attach()
580 if (regbase == NULL) { in media_bay_attach()
588 bay->base = regbase; in media_bay_attach()
/drivers/mfd/
Dsm501.c44 void __iomem *regbase; member
898 result = smc501_readl(smgpio->regbase + SM501_GPIO_DATA_LOW); in sm501_gpio_get()
929 void __iomem *regs = smchip->regbase; in sm501_gpio_set()
953 void __iomem *regs = smchip->regbase; in sm501_gpio_input()
980 void __iomem *regs = smchip->regbase; in sm501_gpio_output()
1030 chip->regbase = gpio->regs + SM501_GPIO_DATA_HIGH; in sm501_gpio_register_chip()
1034 chip->regbase = gpio->regs + SM501_GPIO_DATA_LOW; in sm501_gpio_register_chip()
/drivers/net/wireless/brcm80211/brcmfmac/
Dchip.c547 u32 *regbase, u32 *wrapbase) in brcmf_chip_dmp_get_regaddr() argument
554 *regbase = 0; in brcmf_chip_dmp_get_regaddr()
602 if (*regbase == 0 && stype == DMP_SLAVE_TYPE_SLAVE) in brcmf_chip_dmp_get_regaddr()
603 *regbase = val & DMP_SLAVE_ADDR_BASE; in brcmf_chip_dmp_get_regaddr()
606 } while (*regbase == 0 || *wrapbase == 0); in brcmf_chip_dmp_get_regaddr()
/drivers/video/fbdev/aty/
Daty128fb.c455 void __iomem *regbase; /* remapped mmio */ member
548 return readl (par->regbase + regindex); in _aty_ld_le32()
554 writel (val, par->regbase + regindex); in _aty_st_le32()
560 return readb (par->regbase + regindex); in _aty_ld_8()
566 writeb (val, par->regbase + regindex); in _aty_st_8()
2127 par->regbase = pci_ioremap_bar(pdev, 2); in aty128_probe()
2128 if (!par->regbase) in aty128_probe()
2187 iounmap(par->regbase); in aty128_probe()
2220 iounmap(par->regbase); in aty128_remove()

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