| /drivers/clk/st/ |
| D | clkgen-fsyn.c | 40 unsigned long sdiv; member
45 { .mdiv = 0x1f, .pe = 0x0, .sdiv = 0x7, .nsdiv = 0 }, /* 312.5 Khz */
46 { .mdiv = 0x17, .pe = 0x25ed, .sdiv = 0x1, .nsdiv = 0 }, /* 27 MHz */
47 { .mdiv = 0x1a, .pe = 0x7b36, .sdiv = 0x2, .nsdiv = 1 }, /* 36.87 MHz */
48 { .mdiv = 0x13, .pe = 0x0, .sdiv = 0x2, .nsdiv = 1 }, /* 48 MHz */
49 { .mdiv = 0x11, .pe = 0x1c72, .sdiv = 0x1, .nsdiv = 1 }, /* 108 MHz */
53 { .mdiv = 0x1f, .pe = 0x0, .sdiv = 0x7, .nsdiv = 0 }, /* 625 Khz */
54 { .mdiv = 0x13, .pe = 0x777c, .sdiv = 0x4, .nsdiv = 1 }, /* 25.175 MHz */
55 { .mdiv = 0x19, .pe = 0x4d35, .sdiv = 0x2, .nsdiv = 0 }, /* 25.200 MHz */
56 { .mdiv = 0x11, .pe = 0x1c72, .sdiv = 0x4, .nsdiv = 1 }, /* 27.000 MHz */
[all …]
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| /drivers/clk/samsung/ |
| D | clk-pll.c | 77 u32 pll_con, mdiv, pdiv, sdiv; in samsung_pll2126_recalc_rate() local
83 sdiv = (pll_con >> PLL2126_SDIV_SHIFT) & PLL2126_SDIV_MASK; in samsung_pll2126_recalc_rate()
86 do_div(fvco, (pdiv + 2) << sdiv); in samsung_pll2126_recalc_rate()
110 u32 pll_con, mdiv, pdiv, sdiv; in samsung_pll3000_recalc_rate() local
116 sdiv = (pll_con >> PLL3000_SDIV_SHIFT) & PLL3000_SDIV_MASK; in samsung_pll3000_recalc_rate()
119 do_div(fvco, pdiv << sdiv); in samsung_pll3000_recalc_rate()
147 u32 mdiv, pdiv, sdiv, pll_con; in samsung_pll35xx_recalc_rate() local
153 sdiv = (pll_con >> PLL35XX_SDIV_SHIFT) & PLL35XX_SDIV_MASK; in samsung_pll35xx_recalc_rate()
156 do_div(fvco, (pdiv << sdiv)); in samsung_pll35xx_recalc_rate()
192 tmp |= rate->sdiv << PLL35XX_SDIV_SHIFT; in samsung_pll35xx_set_rate()
[all …]
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| D | clk-pll.h | 43 .sdiv = (_s), \
51 .sdiv = (_s), \
60 .sdiv = (_s), \
69 .sdiv = (_s), \
79 .sdiv = (_s), \
92 unsigned int sdiv; member
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| D | clk-exynos3250.c | 1006 exynos3250_dmc_plls[bpll].rate_table[0].sdiv in exynos3250_cmu_dmc_init()
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| /drivers/gpu/drm/nouveau/core/subdev/clock/ |
| D | nve0.c | 119 u32 sdiv = (sctl & 0x0000003f) + 2; in read_div() local
120 return (sclk * 2) / sdiv; in read_div()
144 u32 sclk, sdiv; in read_clk() local
150 sdiv = 1; in read_clk()
153 sdiv = 0; in read_clk()
162 sdiv = 1; in read_clk()
164 sdiv = 0; in read_clk()
168 sdiv = 0; in read_clk()
173 if (sdiv) in read_clk()
174 sdiv = ((sctl & 0x00003f00) >> 8) + 2; in read_clk()
[all …]
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| D | nva3.c | 63 u32 sctl, sdiv, sclk; in read_clk() local
99 sdiv = ((sctl & 0x003f0000) >> 16) + 2; in read_clk()
100 return (sclk * 2) / sdiv; in read_clk()
183 u32 oclk, sclk, sdiv, diff; in nva3_clk_info() local
199 sdiv = min((sclk * 2) / khz, (u32)65); in nva3_clk_info()
200 oclk = (sclk * 2) / sdiv; in nva3_clk_info()
206 sdiv++; in nva3_clk_info()
207 oclk = (sclk * 2) / sdiv; in nva3_clk_info()
214 if (sdiv > 4) { in nva3_clk_info()
215 info->clk = (((sdiv - 2) << 16) | 0x00003100); in nva3_clk_info()
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| D | nvc0.c | 113 u32 sdiv = (sctl & 0x0000003f) + 2; in read_div() local
114 return (sclk * 2) / sdiv; in read_div()
128 u32 sclk, sdiv; in read_clk() local
135 sdiv = ((sctl & 0x00003f00) >> 8) + 2; in read_clk()
138 sdiv = ((sctl & 0x0000003f) >> 0) + 2; in read_clk()
142 return (sclk * 2) / sdiv; in read_clk()
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