Searched refs:src_clk (Results 1 – 5 of 5) sorted by relevance
/drivers/gpu/drm/msm/mdp/mdp4/ |
D | mdp4_dtv_encoder.c | 26 struct clk *src_clk; member 117 ret = clk_set_rate(mdp4_dtv_encoder->src_clk, pc); in mdp4_dtv_encoder_dpms() 120 clk_prepare_enable(mdp4_dtv_encoder->src_clk); in mdp4_dtv_encoder_dpms() 142 clk_disable_unprepare(mdp4_dtv_encoder->src_clk); in mdp4_dtv_encoder_dpms() 251 return clk_round_rate(mdp4_dtv_encoder->src_clk, rate); in mdp4_dtv_round_pixclk() 273 mdp4_dtv_encoder->src_clk = devm_clk_get(dev->dev, "src_clk"); in mdp4_dtv_encoder_init() 274 if (IS_ERR(mdp4_dtv_encoder->src_clk)) { in mdp4_dtv_encoder_init() 276 ret = PTR_ERR(mdp4_dtv_encoder->src_clk); in mdp4_dtv_encoder_init()
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/drivers/spi/ |
D | spi-s3c64xx.c | 185 struct clk *src_clk; member 592 clk_disable_unprepare(sdd->src_clk); in s3c64xx_spi_config() 638 clk_set_rate(sdd->src_clk, sdd->cur_speed * 2); in s3c64xx_spi_config() 640 clk_prepare_enable(sdd->src_clk); in s3c64xx_spi_config() 645 val |= ((clk_get_rate(sdd->src_clk) / sdd->cur_speed / 2 - 1) in s3c64xx_spi_config() 837 speed = clk_get_rate(sdd->src_clk) / 2 / (0 + 1); in s3c64xx_spi_setup() 842 psr = clk_get_rate(sdd->src_clk) / 2 / spi->max_speed_hz - 1; in s3c64xx_spi_setup() 847 speed = clk_get_rate(sdd->src_clk) / 2 / (psr + 1); in s3c64xx_spi_setup() 857 speed = clk_get_rate(sdd->src_clk) / 2 / (psr + 1); in s3c64xx_spi_setup() 1154 sdd->src_clk = devm_clk_get(&pdev->dev, clk_name); in s3c64xx_spi_probe() [all …]
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/drivers/gpu/drm/msm/mdp/mdp5/ |
D | mdp5_kms.c | 406 ret = get_clk(pdev, &mdp5_kms->src_clk, "core_clk_src"); in mdp5_kms_init() 419 ret = clk_set_rate(mdp5_kms->src_clk, config->max_clk); in mdp5_kms_init()
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D | mdp5_kms.h | 69 struct clk *src_clk; member
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/drivers/mmc/host/ |
D | sunxi-mmc.c | 621 u32 rate, oclk_dly, rval, sclk_dly, src_clk; in sunxi_mmc_clk_set_rate() local 666 src_clk = clk_get_rate(clk_get_parent(host->clk_mmc)); in sunxi_mmc_clk_set_rate() 667 if (src_clk >= 300000000 && src_clk <= 400000000) { in sunxi_mmc_clk_set_rate()
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