| /drivers/media/platform/ti-vpe/ |
| D | sc.c | 64 void sc_set_hs_coeffs(struct sc_data *sc, void *addr, unsigned int src_w, in sc_set_hs_coeffs() argument
73 if (dst_w > src_w) { in sc_set_hs_coeffs()
76 if ((dst_w << 1) < src_w) in sc_set_hs_coeffs()
78 if ((dst_w << 1) < src_w) in sc_set_hs_coeffs()
81 if (dst_w == src_w) { in sc_set_hs_coeffs()
84 sixteenths = (dst_w << 4) / src_w; in sc_set_hs_coeffs()
158 u32 *sc_reg17, unsigned int src_w, unsigned int src_h, in sc_config_scaler() argument
188 if (src_w == dst_w && src_h == dst_h) { in sc_config_scaler()
200 dcm_x = src_w / dst_w; in sc_config_scaler()
212 lin_acc_inc = div64_u64(((u64)(src_w >> dcm_shift) - 1) << 24, lltmp); in sc_config_scaler()
[all …]
|
| D | sc.h | 199 void sc_set_hs_coeffs(struct sc_data *sc, void *addr, unsigned int src_w,
204 u32 *sc_reg17, unsigned int src_w, unsigned int src_h,
|
| /drivers/media/pci/ivtv/ |
| D | ivtv-yuv.c | 242 f->tru_w, f->src_w, f->dst_w, f->src_x, f->dst_x); in ivtv_yuv_handle_horizontal()
245 x_cutoff = f->src_w + f->src_x; in ivtv_yuv_handle_horizontal()
269 if (f->dst_w >= f->src_w) in ivtv_yuv_handle_horizontal()
275 if (f->dst_w < f->src_w) in ivtv_yuv_handle_horizontal()
281 reg_2870_offset = (f->src_x * ((f->dst_w << 21) / f->src_w)) >> 19; in ivtv_yuv_handle_horizontal()
283 if (f->dst_w >= f->src_w) { in ivtv_yuv_handle_horizontal()
285 master_width = (f->src_w * 0x00200000) / (f->dst_w); in ivtv_yuv_handle_horizontal()
286 if (master_width * f->dst_w != f->src_w * 0x00200000) in ivtv_yuv_handle_horizontal()
298 if (f->dst_w > f->src_w) in ivtv_yuv_handle_horizontal()
299 reg_2870_base = ((f->dst_w - f->src_w)<<16) / (f->src_w <<14); in ivtv_yuv_handle_horizontal()
[all …]
|
| /drivers/gpu/drm/i915/ |
| D | intel_sprite.c | 147 uint32_t src_w, uint32_t src_h) in vlv_update_plane() argument
223 intel_update_sprite_watermarks(dplane, crtc, src_w, src_h, in vlv_update_plane()
225 src_w != crtc_w || src_h != crtc_h); in vlv_update_plane()
228 src_w--; in vlv_update_plane()
243 x += src_w; in vlv_update_plane()
245 linear_offset += src_h * fb->pitches[0] + src_w * pixel_size; in vlv_update_plane()
357 uint32_t src_w, uint32_t src_h) in ivb_update_plane() argument
421 intel_update_sprite_watermarks(plane, crtc, src_w, src_h, pixel_size, in ivb_update_plane()
423 src_w != crtc_w || src_h != crtc_h); in ivb_update_plane()
426 src_w--; in ivb_update_plane()
[all …]
|
| D | intel_overlay.c | 431 short src_w; member
741 tmp_width = packed_width_bytes(params->format, params->src_w); in intel_overlay_do_put_image()
743 tmp_width = params->src_w; in intel_overlay_do_put_image()
745 swidth = params->src_w; in intel_overlay_do_put_image()
755 swidth |= (params->src_w/uv_hscale) << 16; in intel_overlay_do_put_image()
757 params->src_w/uv_hscale); in intel_overlay_do_put_image()
759 params->src_w/uv_hscale); in intel_overlay_do_put_image()
1137 params->src_w = put_image_rec->src_width; in intel_overlay_put_image()
1142 params->src_scan_w > params->src_w) { in intel_overlay_put_image()
|
| /drivers/gpu/drm/msm/mdp/mdp4/ |
| D | mdp4_plane.c | 45 uint32_t src_w, uint32_t src_h) in mdp4_plane_update() argument
58 src_x, src_y, src_w, src_h); in mdp4_plane_update()
130 uint32_t src_w, uint32_t src_h) in mdp4_plane_mode_set() argument
143 src_w = src_w >> 16; in mdp4_plane_mode_set()
147 fb->base.id, src_x, src_y, src_w, src_h, in mdp4_plane_mode_set()
150 if (src_w != crtc_w) { in mdp4_plane_mode_set()
161 MDP4_PIPE_SRC_SIZE_WIDTH(src_w) | in mdp4_plane_mode_set()
|
| /drivers/gpu/drm/msm/mdp/mdp5/ |
| D | mdp5_plane.c | 45 uint32_t src_w, uint32_t src_h) in mdp5_plane_update() argument
58 src_x, src_y, src_w, src_h); in mdp5_plane_update()
219 uint32_t src_w, uint32_t src_h) in mdp5_plane_mode_set() argument
239 src_w = src_w >> 16; in mdp5_plane_mode_set()
243 fb->base.id, src_x, src_y, src_w, src_h, in mdp5_plane_mode_set()
249 nblks = request_smp_blocks(plane, fb->pixel_format, nplanes, src_w); in mdp5_plane_mode_set()
262 if (src_w != crtc_w) { in mdp5_plane_mode_set()
273 MDP5_PIPE_SRC_IMG_SIZE_WIDTH(src_w) | in mdp5_plane_mode_set()
277 MDP5_PIPE_SRC_SIZE_WIDTH(src_w) | in mdp5_plane_mode_set()
|
| /drivers/gpu/drm/nouveau/dispnv04/ |
| D | overlay.c | 97 uint32_t src_w, uint32_t src_h) in nv10_update_plane() argument
113 src_w >>= 16; in nv10_update_plane()
116 format = ALIGN(src_w * 4, 0x100); in nv10_update_plane()
122 if (crtc_w < (src_w >> 1) || crtc_h < (src_h >> 1)) in nv10_update_plane()
125 if (crtc_w < (src_w >> 3) || crtc_h < (src_h >> 3)) in nv10_update_plane()
140 nvif_wr32(dev, NV_PVIDEO_SIZE_IN(flip), src_h << 16 | src_w); in nv10_update_plane()
142 nvif_wr32(dev, NV_PVIDEO_DS_DX(flip), (src_w << 20) / crtc_w); in nv10_update_plane()
347 uint32_t src_w, uint32_t src_h) in nv04_update_plane() argument
361 src_w >>= 16; in nv04_update_plane()
364 pitch = ALIGN(src_w * 4, 0x100); in nv04_update_plane()
[all …]
|
| /drivers/staging/imx-drm/ |
| D | ipuv3-plane.c | 96 uint32_t src_w, uint32_t src_h) in ipu_plane_mode_set() argument
102 if (src_w != crtc_w || src_h != crtc_h) in ipu_plane_mode_set()
110 src_w -= -crtc_x; in ipu_plane_mode_set()
126 src_w = crtc_w; in ipu_plane_mode_set()
176 ipu_cpmem_set_resolution(ipu_plane->ipu_ch, src_w, src_h); in ipu_plane_mode_set()
270 uint32_t src_w, uint32_t src_h) in ipu_update_plane() argument
284 src_x >> 16, src_y >> 16, src_w >> 16, src_h >> 16); in ipu_update_plane()
|
| D | ipuv3-plane.h | 42 uint32_t src_x, uint32_t src_y, uint32_t src_w,
|
| /drivers/gpu/drm/sti/ |
| D | sti_layer.c | 74 int src_x, int src_y, int src_w, int src_h) in sti_layer_prepare() argument
100 layer->src_w = src_w; in sti_layer_prepare()
115 layer->src_w, layer->src_h, layer->src_x, in sti_layer_prepare()
|
| D | sti_layer.h | 99 int src_w, src_h; member
116 int src_w, int src_h);
|
| D | sti_drm_plane.c | 30 uint32_t src_w, uint32_t src_h) in sti_drm_update_plane() argument
51 src_w >> 16, src_h >> 16); in sti_drm_update_plane()
|
| /drivers/gpu/drm/ |
| D | drm_rect.c | 131 int src_w = drm_rect_width(src); in drm_rect_calc_hscale() local
133 int hscale = drm_calc_scale(src_w, dst_w); in drm_rect_calc_hscale()
199 int src_w = drm_rect_width(src); in drm_rect_calc_hscale_relaxed() local
201 int hscale = drm_calc_scale(src_w, dst_w); in drm_rect_calc_hscale_relaxed()
207 int max_dst_w = src_w / min_hscale; in drm_rect_calc_hscale_relaxed()
217 drm_rect_adjust_size(src, max_src_w - src_w, 0); in drm_rect_calc_hscale_relaxed()
|
| D | drm_plane_helper.c | 189 uint32_t src_w, uint32_t src_h) in drm_primary_helper_update() argument
201 .x2 = src_x + src_w, in drm_primary_helper_update()
|
| D | drm_crtc.c | 2263 uint32_t src_w, uint32_t src_h) in __setplane_internal() argument
2304 if (src_w > fb_width || in __setplane_internal()
2305 src_x > fb_width - src_w || in __setplane_internal()
2310 src_w >> 16, ((src_w & 0xffff) * 15625) >> 10, in __setplane_internal()
2321 src_x, src_y, src_w, src_h); in __setplane_internal()
2347 uint32_t src_w, uint32_t src_h) in setplane_internal() argument
2354 src_x, src_y, src_w, src_h); in setplane_internal()
2435 plane_req->src_w, plane_req->src_h); in drm_mode_setplane()
2722 uint32_t src_w = 0, src_h = 0; in drm_mode_cursor_universal() local
2760 src_w = fb->width << 16; in drm_mode_cursor_universal()
[all …]
|
| /drivers/gpu/drm/omapdrm/ |
| D | omap_plane.c | 201 uint32_t src_w, uint32_t src_h, in omap_plane_mode_set() argument
215 win->src_w = src_w >> 16; in omap_plane_mode_set()
244 uint32_t src_w, uint32_t src_h) in omap_plane_update() argument
253 swap(src_w, src_h); in omap_plane_update()
259 src_x, src_y, src_w, src_h, in omap_plane_update()
|
| D | omap_drv.h | 50 uint32_t src_w, src_h; member
170 uint32_t src_w, uint32_t src_h,
|
| D | omap_fb.c | 173 info->width = win->src_w; in omap_framebuffer_update_scanout()
180 uint32_t w = win->src_w; in omap_framebuffer_update_scanout()
|
| /drivers/gpu/drm/exynos/ |
| D | exynos_drm_plane.c | 76 uint32_t src_w, uint32_t src_h) in exynos_plane_mode_set() argument
120 overlay->src_width = src_w; in exynos_plane_mode_set()
182 uint32_t src_w, uint32_t src_h) in exynos_update_plane() argument
188 src_w >> 16, src_h >> 16); in exynos_update_plane()
|
| D | exynos_drm_plane.h | 16 uint32_t src_w, uint32_t src_h);
|
| D | exynos_drm_fimc.c | 960 u32 src_w, src_h, dst_w, dst_h; in fimc_set_prescaler() local
964 src_w = src->h; in fimc_set_prescaler()
967 src_w = src->w; in fimc_set_prescaler()
980 hfactor = fls(src_w / dst_w / 2); in fimc_set_prescaler()
992 pre_dst_width = src_w >> hfactor; in fimc_set_prescaler()
998 sc->hratio = (src_w << 14) / (dst_w << hfactor); in fimc_set_prescaler()
1000 sc->up_h = (dst_w >= src_w) ? true : false; in fimc_set_prescaler()
|
| /drivers/gpu/drm/shmobile/ |
| D | shmob_drm_plane.c | 180 uint32_t src_w, uint32_t src_h) in shmob_drm_plane_update() argument
193 if (src_w >> 16 != crtc_w || src_h >> 16 != crtc_h) { in shmob_drm_plane_update()
|
| /drivers/gpu/drm/armada/ |
| D | armada_overlay.c | 104 uint32_t src_x, uint32_t src_y, uint32_t src_w, uint32_t src_h) in armada_plane_update() argument
137 val = (src_h & 0xffff0000) | src_w >> 16; in armada_plane_update()
211 val = (src_h & 0xffff0000) | src_w >> 16; in armada_plane_update()
|
| /drivers/gpu/drm/rcar-du/ |
| D | rcar_du_plane.c | 280 uint32_t src_w, uint32_t src_h) in rcar_du_plane_update() argument
295 if (src_w >> 16 != crtc_w || src_h >> 16 != crtc_h) { in rcar_du_plane_update()
|