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Searched refs:writeVal (Results 1 – 6 of 6) sorted by relevance

/drivers/net/wireless/rtlwifi/rtl8192cu/
Drf.c206 u32 writeVal, customer_limit, rf; in _rtl92c_get_txpower_writeval_by_regulatory() local
212 writeVal = rtlphy->mcs_offset in _rtl92c_get_txpower_writeval_by_regulatory()
217 rf == 0 ? 'A' : 'B', writeVal); in _rtl92c_get_txpower_writeval_by_regulatory()
235 writeVal = rtlphy->mcs_offset[chnlgroup][index + in _rtl92c_get_txpower_writeval_by_regulatory()
241 rf == 0 ? 'A' : 'B', writeVal); in _rtl92c_get_txpower_writeval_by_regulatory()
244 writeVal = ((index < 2) ? powerBase0[rf] : in _rtl92c_get_txpower_writeval_by_regulatory()
248 rf == 0 ? 'A' : 'B', writeVal); in _rtl92c_get_txpower_writeval_by_regulatory()
293 writeVal = customer_limit + ((index < 2) ? in _rtl92c_get_txpower_writeval_by_regulatory()
297 rf == 0 ? 'A' : 'B', writeVal); in _rtl92c_get_txpower_writeval_by_regulatory()
301 writeVal = rtlphy->mcs_offset[chnlgroup] in _rtl92c_get_txpower_writeval_by_regulatory()
[all …]
/drivers/staging/rtl8723au/hal/
Drtl8723a_rf6052.c242 u32 writeVal, customer_limit, rf; in getTxPowerWriteValByRegulatory() local
250 writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + in getTxPowerWriteValByRegulatory()
270 writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + in getTxPowerWriteValByRegulatory()
275 writeVal = ((index < 2) ? powerBase0[rf] : powerBase1[rf]); in getTxPowerWriteValByRegulatory()
293 writeVal = customer_limit + ((index<2)?powerBase0[rf]:powerBase1[rf]); in getTxPowerWriteValByRegulatory()
297 writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + in getTxPowerWriteValByRegulatory()
307 writeVal = 0x14141414; in getTxPowerWriteValByRegulatory()
309 writeVal = 0x00000000; in getTxPowerWriteValByRegulatory()
314 writeVal = writeVal - 0x06060606; in getTxPowerWriteValByRegulatory()
316 writeVal = writeVal; in getTxPowerWriteValByRegulatory()
[all …]
/drivers/net/wireless/rtlwifi/rtl8192ce/
Drf.c202 u32 writeVal, customer_limit, rf; in _rtl92c_get_txpower_writeval_by_regulatory() local
209 writeVal = rtlphy->mcs_offset[chnlgroup][index + in _rtl92c_get_txpower_writeval_by_regulatory()
215 rf == 0 ? 'A' : 'B', writeVal); in _rtl92c_get_txpower_writeval_by_regulatory()
219 writeVal = ((index < 2) ? powerBase0[rf] : in _rtl92c_get_txpower_writeval_by_regulatory()
224 rf == 0 ? 'A' : 'B', writeVal); in _rtl92c_get_txpower_writeval_by_regulatory()
239 writeVal = rtlphy->mcs_offset[chnlgroup] in _rtl92c_get_txpower_writeval_by_regulatory()
246 rf == 0 ? 'A' : 'B', writeVal); in _rtl92c_get_txpower_writeval_by_regulatory()
250 writeVal = in _rtl92c_get_txpower_writeval_by_regulatory()
255 rf == 0 ? 'A' : 'B', writeVal); in _rtl92c_get_txpower_writeval_by_regulatory()
305 writeVal = customer_limit + in _rtl92c_get_txpower_writeval_by_regulatory()
[all …]
/drivers/staging/rtl8192e/rtl8192e/
Dr8190P_rtl8256.c260 u32 writeVal, powerBase0, powerBase1, writeVal_tmp; in PHY_SetRF8256OFDMTxPower() local
273 writeVal = (u32)(priv->MCSTxPowerLevelOriginalOffset[index] + in PHY_SetRF8256OFDMTxPower()
275 byte0 = (u8)(writeVal & 0x7f); in PHY_SetRF8256OFDMTxPower()
276 byte1 = (u8)((writeVal & 0x7f00)>>8); in PHY_SetRF8256OFDMTxPower()
277 byte2 = (u8)((writeVal & 0x7f0000)>>16); in PHY_SetRF8256OFDMTxPower()
278 byte3 = (u8)((writeVal & 0x7f000000)>>24); in PHY_SetRF8256OFDMTxPower()
295 writeVal = 0x03030303; in PHY_SetRF8256OFDMTxPower()
297 writeVal = (byte3 << 24) | (byte2 << 16) | in PHY_SetRF8256OFDMTxPower()
299 rtl8192_setBBreg(dev, RegOffset[index], 0x7f7f7f7f, writeVal); in PHY_SetRF8256OFDMTxPower()
/drivers/staging/rtl8192u/
Dr8190_rtl8256.c245 u32 writeVal, powerBase0, powerBase1, writeVal_tmp; in PHY_SetRF8256OFDMTxPower() local
256 writeVal = priv->MCSTxPowerLevelOriginalOffset[index] + ((index < 2)?powerBase0:powerBase1); in PHY_SetRF8256OFDMTxPower()
257 byte0 = (u8)(writeVal & 0x7f); in PHY_SetRF8256OFDMTxPower()
258 byte1 = (u8)((writeVal & 0x7f00)>>8); in PHY_SetRF8256OFDMTxPower()
259 byte2 = (u8)((writeVal & 0x7f0000)>>16); in PHY_SetRF8256OFDMTxPower()
260 byte3 = (u8)((writeVal & 0x7f000000)>>24); in PHY_SetRF8256OFDMTxPower()
282 writeVal = 0x03030303; in PHY_SetRF8256OFDMTxPower()
284 writeVal = (byte3<<24) | (byte2<<16) | (byte1<<8) | byte0; in PHY_SetRF8256OFDMTxPower()
286 rtl8192_setBBreg(dev, RegOffset[index], 0x7f7f7f7f, writeVal); in PHY_SetRF8256OFDMTxPower()
/drivers/gpu/drm/gma500/
Dpsb_irq.c93 u32 writeVal = PSB_RVDC32(reg); in psb_enable_pipestat() local
94 writeVal |= (mask | (mask >> 16)); in psb_enable_pipestat()
95 PSB_WVDC32(writeVal, reg); in psb_enable_pipestat()
109 u32 writeVal = PSB_RVDC32(reg); in psb_disable_pipestat() local
110 writeVal &= ~mask; in psb_disable_pipestat()
111 PSB_WVDC32(writeVal, reg); in psb_disable_pipestat()