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Searched refs:writeq (Results 1 – 25 of 73) sorted by relevance

123

/drivers/net/ethernet/neterion/
Ds2io.c1144 writeq(val64, &bar0->tti_data1_mem); in init_tti()
1169 writeq(val64, &bar0->tti_data2_mem); in init_tti()
1174 writeq(val64, &bar0->tti_command_mem); in init_tti()
1219 writeq(val64, &bar0->sw_reset); in init_nic()
1226 writeq(val64, &bar0->sw_reset); in init_nic()
1248 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1250 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key); in init_nic()
1260 writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len); in init_nic()
1281 writeq(val64, &bar0->tx_fifo_partition_0); in init_nic()
1282 writeq(val64, &bar0->tx_fifo_partition_1); in init_nic()
[all …]
/drivers/net/ethernet/neterion/vxge/
Dvxge-traffic.c51 writeq(VXGE_HW_INTR_MASK_ALL, &vp_reg->kdfcctl_errors_reg); in vxge_hw_vpath_intr_enable()
107 writeq((u32)vxge_bVALn((VXGE_HW_GENERAL_ERRORS_REG_DBLGEN_FIFO1_OVRFLOW| in vxge_hw_vpath_intr_enable()
183 writeq(VXGE_HW_INTR_MASK_ALL, &vp_reg->kdfcctl_errors_mask); in vxge_hw_vpath_intr_disable()
239 writeq(val64, &vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_TX]); in vxge_hw_vpath_tti_ci_set()
249 writeq(val64, &ring->vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_RX]); in vxge_hw_vpath_dynamic_rti_ci_set()
262 writeq(val64, &fifo->vp_reg->tim_cfg3_int_num[VXGE_HW_VPATH_INTR_TX]); in vxge_hw_vpath_dynamic_tti_rtimer_set()
278 writeq(val64, &ring->vp_reg->tim_cfg3_int_num[VXGE_HW_VPATH_INTR_RX]); in vxge_hw_vpath_dynamic_rti_rtimer_set()
388 writeq(val64, &hldev->common_reg->tim_int_status0); in vxge_hw_device_intr_enable()
390 writeq(~val64, &hldev->common_reg->tim_int_mask0); in vxge_hw_device_intr_enable()
427 writeq(VXGE_HW_INTR_MASK_ALL, &hldev->common_reg->tim_int_mask0); in vxge_hw_device_intr_disable()
[all …]
Dvxge-config.c40 writeq(val64, &vp_reg->rxmac_vcfg0); in vxge_hw_vpath_set_zero_rx_frm_len()
172 writeq(*data0, &vp_reg->rts_access_steer_data0); in vxge_hw_vpath_fw_api()
173 writeq(*data1, &vp_reg->rts_access_steer_data1); in vxge_hw_vpath_fw_api()
529 writeq(VXGE_HW_SWAPPER_READ_BYTE_SWAP_ENABLE, in __vxge_hw_legacy_swapper_set()
531 writeq(VXGE_HW_SWAPPER_READ_BIT_FLAP_ENABLE, in __vxge_hw_legacy_swapper_set()
533 writeq(VXGE_HW_SWAPPER_WRITE_BYTE_SWAP_ENABLE, in __vxge_hw_legacy_swapper_set()
535 writeq(VXGE_HW_SWAPPER_WRITE_BIT_FLAP_ENABLE, in __vxge_hw_legacy_swapper_set()
540 writeq(VXGE_HW_SWAPPER_READ_BYTE_SWAP_ENABLE, in __vxge_hw_legacy_swapper_set()
542 writeq(VXGE_HW_SWAPPER_WRITE_BYTE_SWAP_ENABLE, in __vxge_hw_legacy_swapper_set()
547 writeq(VXGE_HW_SWAPPER_READ_BIT_FLAP_ENABLE, in __vxge_hw_legacy_swapper_set()
[all …]
/drivers/staging/unisys/channels/
Dchannel.c64 writeq(nof, &pqhdr->NumOverflows); in visor_signal_insert()
81 writeq(readq(&pqhdr->NumSignalsSent) + 1, &pqhdr->NumSignalsSent); in visor_signal_insert()
119 writeq(readq(&pqhdr->NumEmptyCnt) + 1, &pqhdr->NumEmptyCnt); in visor_signal_remove()
134 writeq(readq(&pqhdr->NumSignalsReceived) + 1, in visor_signal_remove()
/drivers/ntb/
Dntb_hw.c507 writeq(addr, ndev->reg_ofs.bar2_xlat); in ntb_set_mw_addr()
513 writeq(addr, ndev->reg_ofs.bar4_xlat); in ntb_set_mw_addr()
536 writeq((u64) 1 << db, ndev->reg_ofs.rdb); in ntb_ring_doorbell()
764 writeq(ndev->mw[1].bar_sz + 0x1000, ndev->reg_base + in ntb_xeon_setup()
790 writeq(0, ndev->reg_base + SNB_PBAR4LMT_OFFSET); in ntb_xeon_setup()
808 writeq(SNB_MBAR23_DSD_ADDR, ndev->reg_base + in ntb_xeon_setup()
811 writeq(SNB_MBAR01_DSD_ADDR, ndev->reg_base + in ntb_xeon_setup()
822 writeq(SNB_MBAR4_DSD_ADDR, in ntb_xeon_setup()
835 writeq(SNB_MBAR01_USD_ADDR, ndev->reg_base + in ntb_xeon_setup()
837 writeq(SNB_MBAR23_USD_ADDR, ndev->reg_base + in ntb_xeon_setup()
[all …]
Dntb_hw.h71 #ifndef writeq
72 static inline void writeq(u64 val, void __iomem *addr) in writeq() function
/drivers/net/ethernet/intel/ixgbe/
Dixgbe_common.h154 #ifndef writeq
155 #define writeq writeq macro
156 static inline void writeq(u64 val, void __iomem *addr) in writeq() function
169 writeq(value, reg_addr + reg); in ixgbe_write_reg64()
/drivers/char/
Dhpet.c59 #define write_counter(V, MC) writeq(V, MC)
134 #ifndef writeq
135 static inline void writeq(unsigned long long v, void __iomem *addr) in writeq() function
429 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK), in hpet_release()
443 writeq(v, &timer->hpet_config); in hpet_release()
533 writeq(v, &timer->hpet_config); in hpet_ioctl_ieon()
560 writeq(g, &timer->hpet_config); in hpet_ioctl_ieon()
611 writeq(v, &timer->hpet_config); in hpet_ioctl_common()
648 writeq(v, &timer->hpet_config); in hpet_ioctl_common()
928 writeq(mcfg, &hpet->hpet_config); in hpet_alloc()
/drivers/scsi/fnic/
Dvnic_cq.c61 writeq(paddr, &cq->ctrl->ring_base); in vnic_cq_init()
72 writeq(cq_message_addr, &cq->ctrl->cq_message_addr); in vnic_cq_init()
Dvnic_wq_copy.c109 writeq(paddr, &wq->ctrl->ring_base); in vnic_wq_copy_init()
Dvnic_dev.h75 static inline void writeq(u64 val, void __iomem *reg) in writeq() function
Dvnic_wq.c121 writeq(paddr, &wq->ctrl->ring_base); in vnic_wq_init()
/drivers/net/ethernet/cisco/enic/
Dvnic_cq.c65 writeq(paddr, &cq->ctrl->ring_base); in vnic_cq_init()
76 writeq(cq_message_addr, &cq->ctrl->cq_message_addr); in vnic_cq_init()
Dvnic_dev.h37 static inline void writeq(u64 val, void __iomem *reg) in writeq() function
/drivers/net/ethernet/chelsio/cxgb4vf/
Dadapter.h419 static inline void writeq(u64 val, volatile void __iomem *addr) in writeq() function
449 writeq(val, adapter->regs + reg_addr); in t4_write_reg64()
/drivers/misc/mic/card/
Dmic_virtio.h40 #define iowrite64 writeq
/drivers/net/ethernet/intel/i40evf/
Di40e_osdep.h48 #define wr64(a, reg, value) writeq((value), ((a)->hw_addr + (reg)))
/drivers/net/ethernet/intel/i40e/
Di40e_osdep.h49 #define wr64(a, reg, value) writeq((value), ((a)->hw_addr + (reg)))
/drivers/scsi/csiostor/
Dcsio_defs.h59 static inline void writeq(u64 val, void __iomem *addr) in writeq() function
/drivers/parport/
Dparport_ip32.c531 writeq(ctxval, ctxreg); in parport_ip32_dma_setup_context()
592 writeq(ctrl, &mace->perif.ctrl.parport.cntlstat); in parport_ip32_dma_start()
612 writeq(ctrl, &mace->perif.ctrl.parport.cntlstat); in parport_ip32_dma_start()
621 writeq(ctrl, &mace->perif.ctrl.parport.cntlstat); in parport_ip32_dma_start()
659 writeq(ctrl, &mace->perif.ctrl.parport.cntlstat); in parport_ip32_dma_stop()
682 writeq(ctrl, &mace->perif.ctrl.parport.cntlstat); in parport_ip32_dma_stop()
715 writeq(MACEPAR_CTLSTAT_RESET, &mace->perif.ctrl.parport.cntlstat); in parport_ip32_dma_register()
/drivers/infiniband/hw/qib/
Dqib_7220.h141 writeq(value, &dd->kregbase[regno]); in qib_write_kreg()
Dqib_sd7220.c1068 writeq(data, iaddr + idx); in qib_sd_setvals()
1075 writeq(data, daddr); in qib_sd_setvals()
1097 writeq(rxeq_init_vals[idx].rdesc, iaddr + didx); in qib_sd_setvals()
1103 writeq(data, taddr + (vidx << 6) + idx); in qib_sd_setvals()
/drivers/infiniband/hw/ipath/
Dipath_diag.c193 writeq(data, reg_addr); in ipath_write_umem64()
456 writeq(dp.pbc_wd, piobuf); in ipath_diagpkt_write()
/drivers/input/misc/
Dsgi_btns.c46 writeq(status & ~(3U << 23), &mace->perif.audio.control); in button_status()
/drivers/char/agp/
Dhp-agp.c272 writeq(0, hp->ioc_regs+HP_ZX1_IBASE); in hp_zx1_cleanup()
286 writeq(hp->gart_base | ilog2(hp->gart_size), hp->ioc_regs+HP_ZX1_PCOM); in hp_zx1_tlbflush()

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