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Searched refs:DE_ACT (Results 1 – 16 of 16) sorted by relevance

/sound/pci/echoaudio/
Dlayla20_dsp.c124 DE_ACT(("check_asic_status: failed on read_dsp\n")); in check_asic_status()
167 DE_ACT(("set_sample_rate: Cannot set sample rate - " in set_sample_rate()
177 DE_ACT(("set_sample_rate(%d)\n", rate)); in set_sample_rate()
191 DE_ACT(("set_input_clock:\n")); in set_input_clock()
195 DE_ACT(("Set Layla20 clock to INTERNAL\n")); in set_input_clock()
200 DE_ACT(("Set Layla20 clock to SPDIF\n")); in set_input_clock()
204 DE_ACT(("Set Layla20 clock to WORD\n")); in set_input_clock()
208 DE_ACT(("Set Layla20 clock to SUPER\n")); in set_input_clock()
212 DE_ACT(("Input clock 0x%x not supported for Layla24\n", in set_input_clock()
232 DE_ACT(("set_output_clock: %d\n", clock)); in set_output_clock()
[all …]
Dgina24_dsp.c174 DE_ACT(("set_sample_rate: Cannot set sample rate - " in set_sample_rate()
220 DE_ACT(("set_sample_rate: %d invalid!\n", rate)); in set_sample_rate()
228 DE_ACT(("set_sample_rate: %d clock %d\n", rate, clock)); in set_sample_rate()
239 DE_ACT(("set_input_clock:\n")); in set_input_clock()
248 DE_ACT(("Set Gina24 clock to INTERNAL\n")); in set_input_clock()
254 DE_ACT(("Set Gina24 clock to SPDIF\n")); in set_input_clock()
264 DE_ACT(("Set Gina24 clock to ADAT\n")); in set_input_clock()
269 DE_ACT(("Set Gina24 clock to ESYNC\n")); in set_input_clock()
274 DE_ACT(("Set Gina24 clock to ESYNC96\n")); in set_input_clock()
278 DE_ACT(("Input clock 0x%x not supported for Gina24\n", clock)); in set_input_clock()
[all …]
Dechoaudio_3g.c79 DE_ACT(("WriteControlReg: Setting 0x%x, 0x%x\n", ctl, frq)); in write_control_reg()
92 DE_ACT(("WriteControlReg: not written, no change\n")); in write_control_reg()
261 DE_ACT(("set_sample_rate: Cannot set sample rate - " in set_sample_rate()
316 DE_ACT(("SetSampleRate: %d clock %x\n", rate, control_reg)); in set_sample_rate()
329 DE_ACT(("set_input_clock:\n")); in set_input_clock()
338 DE_ACT(("Set Echo3G clock to INTERNAL\n")); in set_input_clock()
344 DE_ACT(("Set Echo3G clock to SPDIF\n")); in set_input_clock()
354 DE_ACT(("Set Echo3G clock to ADAT\n")); in set_input_clock()
359 DE_ACT(("Set Echo3G clock to WORD\n")); in set_input_clock()
367 DE_ACT(("Input clock 0x%x not supported for Echo3G\n", clock)); in set_input_clock()
[all …]
Dmona_dsp.c205 DE_ACT(("set_sample_rate: Cannot set sample rate - " in set_sample_rate()
282 DE_ACT(("set_sample_rate: %d invalid!\n", rate)); in set_sample_rate()
290 DE_ACT(("set_sample_rate: %d clock %d\n", rate, clock)); in set_sample_rate()
302 DE_ACT(("set_input_clock:\n")); in set_input_clock()
315 DE_ACT(("Set Mona clock to INTERNAL\n")); in set_input_clock()
327 DE_ACT(("Set Mona clock to SPDIF\n")); in set_input_clock()
335 DE_ACT(("Set Mona clock to WORD\n")); in set_input_clock()
349 DE_ACT(("Set Mona clock to ADAT\n")); in set_input_clock()
356 DE_ACT(("Input clock 0x%x not supported for Mona\n", clock)); in set_input_clock()
384 DE_ACT(("Digital mode not supported: %d\n", mode)); in dsp_set_digital_mode()
[all …]
Dlayla24_dsp.c170 DE_ACT(("set_sample_rate: Cannot set sample rate - " in set_sample_rate()
244 DE_ACT(("set_sample_rate: %d clock %d\n", rate, control_reg)); in set_sample_rate()
263 DE_ACT(("Set Layla24 clock to INTERNAL\n")); in set_input_clock()
272 DE_ACT(("Set Layla24 clock to SPDIF\n")); in set_input_clock()
280 DE_ACT(("Set Layla24 clock to WORD\n")); in set_input_clock()
287 DE_ACT(("Set Layla24 clock to ADAT\n")); in set_input_clock()
290 DE_ACT(("Input clock 0x%x not supported for Layla24\n", clock)); in set_input_clock()
356 DE_ACT(("Digital mode not supported: %d\n", mode)); in dsp_set_digital_mode()
396 DE_ACT(("set_digital_mode to %d\n", mode)); in dsp_set_digital_mode()
Dechoaudio_dsp.c83 DE_ACT((KERN_ERR "timeout on send_vector\n")); in send_vector()
107 DE_ACT((KERN_ERR "write_dsp: Set bad_board to TRUE\n")); in write_dsp()
838 DE_ACT(("set_audio_format[%d] = %x\n", pipe_index, dsp_format)); in set_audio_format()
851 DE_ACT(("start_transport %x\n", channel_mask)); in start_transport()
869 DE_ACT(("start_transport: No pipes to start!\n")); in start_transport()
877 DE_ACT(("pause_transport %x\n", channel_mask)); in pause_transport()
896 DE_ACT(("pause_transport: No pipes to stop!\n")); in pause_transport()
904 DE_ACT(("stop_transport %x\n", channel_mask)); in stop_transport()
923 DE_ACT(("stop_transport: No pipes to stop!\n")); in stop_transport()
940 DE_ACT(("rest_in_peace() open=%x\n", chip->pipe_alloc_mask)); in rest_in_peace()
[all …]
Dmia_dsp.c129 DE_ACT(("set_sample_rate: %d invalid!\n", rate)); in set_sample_rate()
156 DE_ACT(("set_input_clock(%d)\n", clock)); in set_input_clock()
184 DE_ACT(("set_vmixer_gain: pipe %d, out %d = %d\n", pipe, output, gain)); in set_vmixer_gain()
214 DE_ACT(("set_professional_spdif %d\n", prof)); in set_professional_spdif()
Dgina20_dsp.c152 DE_ACT(("set_input_clock:\n")); in set_input_clock()
161 DE_ACT(("Set Gina clock to INTERNAL\n")); in set_input_clock()
169 DE_ACT(("Set Gina20 clock to SPDIF\n")); in set_input_clock()
211 DE_ACT(("set_professional_spdif %d\n", prof)); in set_professional_spdif()
Dechoaudio_gml.c71 DE_ACT(("write_control_reg: 0x%x\n", value)); in write_control_reg()
94 DE_ACT(("set_input_auto_mute %d\n", automute)); in set_input_auto_mute()
197 DE_ACT(("set_professional_spdif to %s\n", in set_professional_spdif()
Dechoaudio.c51 DE_ACT(("firmware requested: %s is cached\n", card_fw[fw_index].data)); in get_firmware()
57 DE_ACT(("firmware requested: %s\n", card_fw[fw_index].data)); in get_firmware()
75 DE_ACT(("firmware not released (kept in cache)\n")); in free_firmware()
78 DE_ACT(("firmware released\n")); in free_firmware()
92 DE_ACT(("release_firmware(%d)\n", i)); in free_firmware_cache()
95 DE_ACT(("firmware_cache released\n")); in free_firmware_cache()
353 DE_ACT(("pcm_analog_in_open\n")); in pcm_analog_in_open()
388 DE_ACT(("pcm_analog_out_open\n")); in pcm_analog_out_open()
421 DE_ACT(("pcm_digital_in_open\n")); in pcm_digital_in_open()
463 DE_ACT(("pcm_digital_out_open\n")); in pcm_digital_out_open()
[all …]
Dindigo_express_dsp.c64 DE_ACT(("set_sample_rate: %d clock %d\n", rate, clock)); in set_sample_rate()
92 DE_ACT(("set_vmixer_gain: pipe %d, out %d = %d\n", pipe, output, gain)); in set_vmixer_gain()
Ddarla24_dsp.c131 DE_ACT(("set_sample_rate: Error, invalid sample rate %d\n", in set_sample_rate()
139 DE_ACT(("set_sample_rate: %d clock %d\n", rate, clock)); in set_sample_rate()
Dindigo_dsp.c112 DE_ACT(("set_sample_rate: %d invalid!\n", rate)); in set_sample_rate()
150 DE_ACT(("set_vmixer_gain: pipe %d, out %d = %d\n", pipe, output, gain)); in set_vmixer_gain()
Dindigodj_dsp.c112 DE_ACT(("set_sample_rate: %d invalid!\n", rate)); in set_sample_rate()
150 DE_ACT(("set_vmixer_gain: pipe %d, out %d = %d\n", pipe, output, gain)); in set_vmixer_gain()
Dechoaudio.h314 #define DE_ACT(x) snd_printk x macro
316 #define DE_ACT(x) macro
Dindigoio_dsp.c121 DE_ACT(("set_vmixer_gain: pipe %d, out %d = %d\n", pipe, output, gain)); in set_vmixer_gain()