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Searched refs:SST_VDRTCTL0 (Results 1 – 2 of 2) sorted by relevance

/sound/soc/intel/
Dsst-haswell-dsp.c399 val = readl(sst->addr.pci_cfg + SST_VDRTCTL0); in hsw_block_enable()
401 writel(val & ~bit, sst->addr.pci_cfg + SST_VDRTCTL0); in hsw_block_enable()
423 val = readl(sst->addr.pci_cfg + SST_VDRTCTL0); in hsw_block_disable()
425 writel(val | bit, sst->addr.pci_cfg + SST_VDRTCTL0); in hsw_block_disable()
520 writel(0xffffffff, sst->addr.pci_cfg + SST_VDRTCTL0); in hsw_init()
Dsst-dsp.h153 #define SST_VDRTCTL0 0xa0 macro