Searched refs:TEGRA20_I2S_TIMING (Results 1 – 2 of 2) sorted by relevance
40 #define TEGRA20_I2S_TIMING 0x08 macro
180 regmap_write(i2s->regmap, TEGRA20_I2S_TIMING, val); in tegra20_i2s_hw_params()289 case TEGRA20_I2S_TIMING: in tegra20_i2s_wr_rd_reg()