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Searched refs:clk_i2s (Results 1 – 6 of 6) sorted by relevance

/sound/soc/pxa/
Dpxa2xx-i2s.c82 static struct clk *clk_i2s; variable
107 if (IS_ERR(clk_i2s)) in pxa2xx_i2s_startup()
108 return PTR_ERR(clk_i2s); in pxa2xx_i2s_startup()
168 if (WARN_ON(IS_ERR(clk_i2s))) in pxa2xx_i2s_hw_params()
170 clk_prepare_enable(clk_i2s); in pxa2xx_i2s_hw_params()
263 clk_disable_unprepare(clk_i2s); in pxa2xx_i2s_shutdown()
305 clk_i2s = clk_get(dai->dev, "I2SCLK"); in pxa2xx_i2s_probe()
306 if (IS_ERR(clk_i2s)) in pxa2xx_i2s_probe()
307 return PTR_ERR(clk_i2s); in pxa2xx_i2s_probe()
327 clk_put(clk_i2s); in pxa2xx_i2s_remove()
[all …]
/sound/soc/jz4740/
Djz4740-i2s.c93 struct clk *clk_i2s; member
124 clk_prepare_enable(i2s->clk_i2s); in jz4740_i2s_startup()
146 clk_disable_unprepare(i2s->clk_i2s); in jz4740_i2s_shutdown()
282 clk_set_parent(i2s->clk_i2s, parent); in jz4740_i2s_set_sysclk()
286 clk_set_parent(i2s->clk_i2s, parent); in jz4740_i2s_set_sysclk()
287 ret = clk_set_rate(i2s->clk_i2s, freq); in jz4740_i2s_set_sysclk()
307 clk_disable_unprepare(i2s->clk_i2s); in jz4740_i2s_suspend()
323 clk_prepare_enable(i2s->clk_i2s); in jz4740_i2s_resume()
439 i2s->clk_i2s = devm_clk_get(&pdev->dev, "i2s"); in jz4740_i2s_dev_probe()
440 if (IS_ERR(i2s->clk_i2s)) in jz4740_i2s_dev_probe()
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/sound/soc/tegra/
Dtegra20_i2s.c54 clk_disable_unprepare(i2s->clk_i2s); in tegra20_i2s_runtime_suspend()
64 ret = clk_prepare_enable(i2s->clk_i2s); in tegra20_i2s_runtime_resume()
166 ret = clk_set_rate(i2s->clk_i2s, i2sclock); in tegra20_i2s_hw_params()
357 i2s->clk_i2s = clk_get(&pdev->dev, NULL); in tegra20_i2s_platform_probe()
358 if (IS_ERR(i2s->clk_i2s)) { in tegra20_i2s_platform_probe()
360 ret = PTR_ERR(i2s->clk_i2s); in tegra20_i2s_platform_probe()
433 clk_put(i2s->clk_i2s); in tegra20_i2s_platform_probe()
449 clk_put(i2s->clk_i2s); in tegra20_i2s_platform_remove()
Dtegra30_i2s.c55 clk_disable_unprepare(i2s->clk_i2s); in tegra30_i2s_runtime_suspend()
65 ret = clk_prepare_enable(i2s->clk_i2s); in tegra30_i2s_runtime_resume()
168 ret = clk_set_rate(i2s->clk_i2s, i2sclock); in tegra30_i2s_hw_params()
414 i2s->clk_i2s = clk_get(&pdev->dev, NULL); in tegra30_i2s_platform_probe()
415 if (IS_ERR(i2s->clk_i2s)) { in tegra30_i2s_platform_probe()
417 ret = PTR_ERR(i2s->clk_i2s); in tegra30_i2s_platform_probe()
527 clk_put(i2s->clk_i2s); in tegra30_i2s_platform_probe()
549 clk_put(i2s->clk_i2s); in tegra30_i2s_platform_remove()
Dtegra20_i2s.h157 struct clk *clk_i2s; member
Dtegra30_i2s.h238 struct clk *clk_i2s; member