Searched refs:CACHELINE_BYTES (Results 1 – 3 of 3) sorted by relevance
206 u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES; in intel_emit_post_sync_nonzero_flush()243 u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES; in gen6_render_ring_flush()337 u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES; in gen7_render_ring_flush()422 u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES; in gen8_render_ring_flush()1102 u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES; in pc_render_add_request()1124 scratch_addr += 2 * CACHELINE_BYTES; /* write to separate cachelines */ in pc_render_add_request()1126 scratch_addr += 2 * CACHELINE_BYTES; in pc_render_add_request()1128 scratch_addr += 2 * CACHELINE_BYTES; in pc_render_add_request()1130 scratch_addr += 2 * CACHELINE_BYTES; in pc_render_add_request()1132 scratch_addr += 2 * CACHELINE_BYTES; in pc_render_add_request()[all …]
13 #define CACHELINE_BYTES 64 macro
1138 u32 scratch_addr = ring->scratch.gtt_offset + 2 * CACHELINE_BYTES; in gen8_emit_flush_render()