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Searched refs:signals (Results 1 – 25 of 25) sorted by relevance

/drivers/tty/
Dsynclink_gt.c314 unsigned char signals; /* serial signal states */ member
788 info->signals &= ~(SerialSignal_RTS | SerialSignal_DTR); in set_termios()
797 info->signals |= SerialSignal_DTR; in set_termios()
800 info->signals |= SerialSignal_RTS; in set_termios()
1269 if (info->signals & SerialSignal_RTS) in line_info()
1271 if (info->signals & SerialSignal_CTS) in line_info()
1273 if (info->signals & SerialSignal_DTR) in line_info()
1275 if (info->signals & SerialSignal_DSR) in line_info()
1277 if (info->signals & SerialSignal_DCD) in line_info()
1279 if (info->signals & SerialSignal_RI) in line_info()
[all …]
/drivers/pps/
DKconfig14 Some antennae's PPS signals are connected with the CD (Carrier
18 Some antennae's PPS signals are connected with some special host
/drivers/gpu/drm/sti/
DNOTES14 - The HDMI / DVO / HD Analog / SD analog IP builds the video signals
19 - The VTG (Video Timing Generators) build Vsync signals used by the other HW IP
/drivers/pps/generators/
DKconfig12 utilizes STROBE pin of a parallel port to send PPS signals. It uses
/drivers/usb/serial/
Dsierra.c622 unsigned char signals = *((unsigned char *) in sierra_instat_callback() local
627 signals); in sierra_instat_callback()
631 portdata->dcd_state = ((signals & 0x01) ? 1 : 0); in sierra_instat_callback()
632 portdata->dsr_state = ((signals & 0x02) ? 1 : 0); in sierra_instat_callback()
633 portdata->ri_state = ((signals & 0x08) ? 1 : 0); in sierra_instat_callback()
Doption.c2219 unsigned char signals = *((unsigned char *) in option_instat_callback() local
2223 dev_dbg(dev, "%s: signal x%x\n", __func__, signals); in option_instat_callback()
2227 portdata->dcd_state = ((signals & 0x01) ? 1 : 0); in option_instat_callback()
2228 portdata->dsr_state = ((signals & 0x02) ? 1 : 0); in option_instat_callback()
2229 portdata->ri_state = ((signals & 0x08) ? 1 : 0); in option_instat_callback()
/drivers/staging/dgnc/
Ddgnc_cls.c53 static void cls_parse_modem(struct channel_t *ch, unsigned char signals);
1117 static void cls_parse_modem(struct channel_t *ch, unsigned char signals) in cls_parse_modem() argument
1119 unsigned char msignals = signals; in cls_parse_modem()
1131 unsigned char mswap = signals; in cls_parse_modem()
1156 signals &= 0xf0; in cls_parse_modem()
Ddgnc_neo.c56 static void neo_parse_modem(struct channel_t *ch, unsigned char signals);
1587 static void neo_parse_modem(struct channel_t *ch, unsigned char signals) in neo_parse_modem() argument
1589 unsigned char msignals = signals; in neo_parse_modem()
/drivers/mailbox/
DKconfig6 signals. Say Y if your platform supports hardware mailboxes.
/drivers/media/radio/si4713/
DKconfig36 RDS and RBDS signals as well. This module is the v4l2 radio
/drivers/media/rc/img-ir/
DKconfig24 signals in hardware. This is more reliable, consumes less processing
/drivers/i2c/muxes/
DKconfig57 This is useful for SoCs whose I2C module's signals can be routed to
/drivers/staging/iio/Documentation/
Dinkernel.txt5 signals. The functionality supported will grow as use cases arise.
/drivers/gpio/
DKconfig638 Say yes here to access the GPIO signals of various multi-function
645 Say yes here to access the GPO signals of twl6040
652 Say yes here to access the GPIO signals of WM831x power management
659 Say yes here to access the GPIO signals of WM8350 power management
666 Say yes here to access the GPIO signals of WM8994 audio hub
902 Say yes here to access the GPIO signals of Nano River
/drivers/net/wan/
Dfarsync.c1113 int signals; in fst_intr_ctlchg() local
1115 signals = FST_RDL(card, v24DebouncedSts[port->index]); in fst_intr_ctlchg()
1117 if (signals & (((port->hwif == X21) || (port->hwif == X21D)) in fst_intr_ctlchg()
2136 int signals; in fst_openport() local
2157 signals = FST_RDL(port->card, v24DebouncedSts[port->index]); in fst_openport()
2158 if (signals & (((port->hwif == X21) || (port->hwif == X21D)) in fst_openport()
/drivers/scsi/
Datari_NCR5380.c540 } signals[] = { variable
581 for (i = 0; signals[i].mask; ++i) in NCR5380_print()
582 if (status & signals[i].mask) in NCR5380_print()
583 printk(",%s", signals[i].name); in NCR5380_print()
Dsun3_NCR5380.c494 signals[] = {{ SR_DBP, "PARITY"}, { SR_RST, "RST" }, { SR_BSY, "BSY" }, variable
529 for (i = 0; signals[i].mask ; ++i) in NCR5380_print()
530 if (status & signals[i].mask) in NCR5380_print()
531 printk(",%s", signals[i].name); in NCR5380_print()
DNCR5380.c364 } signals[] = { variable
422 for (i = 0; signals[i].mask; ++i) in NCR5380_print()
423 if (status & signals[i].mask) in NCR5380_print()
424 printk(",%s", signals[i].name); in NCR5380_print()
/drivers/staging/panel/
DKconfig158 port. But before assigning signals, the driver needs to know if it will
160 (SDA/SCL), while parallel ones use 2 or 3 wires for the control signals
/drivers/tty/serial/jsm/
Djsm_neo.c574 static void neo_parse_modem(struct jsm_channel *ch, u8 signals) in neo_parse_modem() argument
576 u8 msignals = signals; in neo_parse_modem()
/drivers/char/
DKconfig295 signals from as low as 1Hz up to 8192Hz, and can also be used
321 signals from as low as 1Hz up to 8192Hz, and can also be used
/drivers/scsi/aic7xxx/
Daic7xxx.reg145 * Writing to this register modifies the control signals on the bus. Only
146 * those signals that are allowed in the current mode (Initiator/Target) are
Daic7xxx.seq485 * Start honoring ATN signals now that
/drivers/spi/
DKconfig218 interface to manage MOSI, MISO, SCK, and chipselect signals. SPI
/drivers/mfd/
DKconfig1079 which have a separate driver; some are control signals, such