1 /****************************************************************************** 2 * 3 * Copyright(c) 2009-2012 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program; if not, write to the Free Software Foundation, Inc., 16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA 17 * 18 * The full GNU General Public License is included in this distribution in the 19 * file called LICENSE. 20 * 21 * Contact Information: 22 * wlanfae <wlanfae@realtek.com> 23 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, 24 * Hsinchu 300, Taiwan. 25 * 26 * Larry Finger <Larry.Finger@lwfinger.net> 27 * 28 *****************************************************************************/ 29 #ifndef __RTL_92S_DM_H__ 30 #define __RTL_92S_DM_H__ 31 32 enum dm_dig_alg { 33 DIG_ALGO_BY_FALSE_ALARM = 0, 34 DIG_ALGO_BY_RSSI = 1, 35 DIG_ALGO_BEFORE_CONNECT_BY_RSSI_AND_ALARM = 2, 36 DIG_ALGO_BY_TOW_PORT = 3, 37 DIG_ALGO_MAX 38 }; 39 40 enum dm_dig_two_port_alg { 41 DIG_TWO_PORT_ALGO_RSSI = 0, 42 DIG_TWO_PORT_ALGO_FALSE_ALARM = 1, 43 }; 44 45 enum dm_dig_dbg { 46 DM_DBG_OFF = 0, 47 DM_DBG_ON = 1, 48 DM_DBG_MAX 49 }; 50 51 enum dm_dig_sta { 52 DM_STA_DIG_OFF = 0, 53 DM_STA_DIG_ON, 54 DM_STA_DIG_MAX 55 }; 56 57 enum dm_dig_connect { 58 DIG_STA_DISCONNECT = 0, 59 DIG_STA_CONNECT = 1, 60 DIG_STA_BEFORE_CONNECT = 2, 61 DIG_AP_DISCONNECT = 3, 62 DIG_AP_CONNECT = 4, 63 DIG_AP_ADD_STATION = 5, 64 DIG_CONNECT_MAX 65 }; 66 67 enum dm_dig_ext_port_alg { 68 DIG_EXT_PORT_STAGE_0 = 0, 69 DIG_EXT_PORT_STAGE_1 = 1, 70 DIG_EXT_PORT_STAGE_2 = 2, 71 DIG_EXT_PORT_STAGE_3 = 3, 72 DIG_EXT_PORT_STAGE_MAX = 4, 73 }; 74 75 enum dm_ratr_sta { 76 DM_RATR_STA_HIGH = 0, 77 DM_RATR_STA_MIDDLEHIGH = 1, 78 DM_RATR_STA_MIDDLE = 2, 79 DM_RATR_STA_MIDDLELOW = 3, 80 DM_RATR_STA_LOW = 4, 81 DM_RATR_STA_ULTRALOW = 5, 82 DM_RATR_STA_MAX 83 }; 84 85 #define DM_TYPE_BYFW 0 86 #define DM_TYPE_BYDRIVER 1 87 88 #define TX_HIGH_PWR_LEVEL_NORMAL 0 89 #define TX_HIGH_PWR_LEVEL_LEVEL1 1 90 #define TX_HIGH_PWR_LEVEL_LEVEL2 2 91 92 #define HAL_DM_DIG_DISABLE BIT(0) /* Disable Dig */ 93 #define HAL_DM_HIPWR_DISABLE BIT(1) /* Disable High Power */ 94 95 #define TX_HIGHPWR_LEVEL_NORMAL 0 96 #define TX_HIGHPWR_LEVEL_NORMAL1 1 97 #define TX_HIGHPWR_LEVEL_NORMAL2 2 98 99 #define TX_POWER_NEAR_FIELD_THRESH_LVL2 74 100 #define TX_POWER_NEAR_FIELD_THRESH_LVL1 67 101 102 #define DM_DIG_THRESH_HIGH 40 103 #define DM_DIG_THRESH_LOW 35 104 #define DM_FALSEALARM_THRESH_LOW 40 105 #define DM_FALSEALARM_THRESH_HIGH 1000 106 #define DM_DIG_HIGH_PWR_THRESH_HIGH 75 107 #define DM_DIG_HIGH_PWR_THRESH_LOW 70 108 #define DM_DIG_BACKOFF 12 109 #define DM_DIG_MAX 0x3e 110 #define DM_DIG_MIN 0x1c 111 #define DM_DIG_MIN_Netcore 0x12 112 #define DM_DIG_BACKOFF_MAX 12 113 #define DM_DIG_BACKOFF_MIN -4 114 115 void rtl92s_dm_watchdog(struct ieee80211_hw *hw); 116 void rtl92s_dm_init(struct ieee80211_hw *hw); 117 void rtl92s_dm_init_edca_turbo(struct ieee80211_hw *hw); 118 119 #endif 120 121