1 /*
2 * ADE7754 Polyphase Multifunction Energy Metering IC Driver
3 *
4 * Copyright 2010 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9 #include <linux/interrupt.h>
10 #include <linux/irq.h>
11 #include <linux/delay.h>
12 #include <linux/mutex.h>
13 #include <linux/device.h>
14 #include <linux/kernel.h>
15 #include <linux/spi/spi.h>
16 #include <linux/slab.h>
17 #include <linux/sysfs.h>
18 #include <linux/list.h>
19 #include <linux/module.h>
20
21 #include <linux/iio/iio.h>
22 #include <linux/iio/sysfs.h>
23 #include "meter.h"
24 #include "ade7754.h"
25
ade7754_spi_write_reg_8(struct device * dev,u8 reg_address,u8 val)26 static int ade7754_spi_write_reg_8(struct device *dev,
27 u8 reg_address,
28 u8 val)
29 {
30 int ret;
31 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
32 struct ade7754_state *st = iio_priv(indio_dev);
33
34 mutex_lock(&st->buf_lock);
35 st->tx[0] = ADE7754_WRITE_REG(reg_address);
36 st->tx[1] = val;
37
38 ret = spi_write(st->us, st->tx, 2);
39 mutex_unlock(&st->buf_lock);
40
41 return ret;
42 }
43
ade7754_spi_write_reg_16(struct device * dev,u8 reg_address,u16 value)44 static int ade7754_spi_write_reg_16(struct device *dev,
45 u8 reg_address,
46 u16 value)
47 {
48 int ret;
49 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
50 struct ade7754_state *st = iio_priv(indio_dev);
51
52 mutex_lock(&st->buf_lock);
53 st->tx[0] = ADE7754_WRITE_REG(reg_address);
54 st->tx[1] = (value >> 8) & 0xFF;
55 st->tx[2] = value & 0xFF;
56 ret = spi_write(st->us, st->tx, 3);
57 mutex_unlock(&st->buf_lock);
58
59 return ret;
60 }
61
ade7754_spi_read_reg_8(struct device * dev,u8 reg_address,u8 * val)62 static int ade7754_spi_read_reg_8(struct device *dev,
63 u8 reg_address,
64 u8 *val)
65 {
66 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
67 struct ade7754_state *st = iio_priv(indio_dev);
68 int ret;
69
70 ret = spi_w8r8(st->us, ADE7754_READ_REG(reg_address));
71 if (ret < 0) {
72 dev_err(&st->us->dev, "problem when reading 8 bit register 0x%02X",
73 reg_address);
74 return ret;
75 }
76 *val = ret;
77
78 return 0;
79 }
80
ade7754_spi_read_reg_16(struct device * dev,u8 reg_address,u16 * val)81 static int ade7754_spi_read_reg_16(struct device *dev,
82 u8 reg_address,
83 u16 *val)
84 {
85 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
86 struct ade7754_state *st = iio_priv(indio_dev);
87 int ret;
88
89 ret = spi_w8r16be(st->us, ADE7754_READ_REG(reg_address));
90 if (ret < 0) {
91 dev_err(&st->us->dev, "problem when reading 16 bit register 0x%02X",
92 reg_address);
93 return ret;
94 }
95
96 *val = ret;
97
98 return 0;
99 }
100
ade7754_spi_read_reg_24(struct device * dev,u8 reg_address,u32 * val)101 static int ade7754_spi_read_reg_24(struct device *dev,
102 u8 reg_address,
103 u32 *val)
104 {
105 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
106 struct ade7754_state *st = iio_priv(indio_dev);
107 int ret;
108 struct spi_transfer xfers[] = {
109 {
110 .tx_buf = st->tx,
111 .rx_buf = st->rx,
112 .bits_per_word = 8,
113 .len = 4,
114 },
115 };
116
117 mutex_lock(&st->buf_lock);
118 st->tx[0] = ADE7754_READ_REG(reg_address);
119 st->tx[1] = 0;
120 st->tx[2] = 0;
121 st->tx[3] = 0;
122
123 ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
124 if (ret) {
125 dev_err(&st->us->dev, "problem when reading 24 bit register 0x%02X",
126 reg_address);
127 goto error_ret;
128 }
129 *val = (st->rx[1] << 16) | (st->rx[2] << 8) | st->rx[3];
130
131 error_ret:
132 mutex_unlock(&st->buf_lock);
133 return ret;
134 }
135
ade7754_read_8bit(struct device * dev,struct device_attribute * attr,char * buf)136 static ssize_t ade7754_read_8bit(struct device *dev,
137 struct device_attribute *attr,
138 char *buf)
139 {
140 int ret;
141 u8 val = 0;
142 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
143
144 ret = ade7754_spi_read_reg_8(dev, this_attr->address, &val);
145 if (ret)
146 return ret;
147
148 return sprintf(buf, "%u\n", val);
149 }
150
ade7754_read_16bit(struct device * dev,struct device_attribute * attr,char * buf)151 static ssize_t ade7754_read_16bit(struct device *dev,
152 struct device_attribute *attr,
153 char *buf)
154 {
155 int ret;
156 u16 val = 0;
157 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
158
159 ret = ade7754_spi_read_reg_16(dev, this_attr->address, &val);
160 if (ret)
161 return ret;
162
163 return sprintf(buf, "%u\n", val);
164 }
165
ade7754_read_24bit(struct device * dev,struct device_attribute * attr,char * buf)166 static ssize_t ade7754_read_24bit(struct device *dev,
167 struct device_attribute *attr,
168 char *buf)
169 {
170 int ret;
171 u32 val = 0;
172 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
173
174 ret = ade7754_spi_read_reg_24(dev, this_attr->address, &val);
175 if (ret)
176 return ret;
177
178 return sprintf(buf, "%u\n", val & 0xFFFFFF);
179 }
180
ade7754_write_8bit(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)181 static ssize_t ade7754_write_8bit(struct device *dev,
182 struct device_attribute *attr,
183 const char *buf,
184 size_t len)
185 {
186 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
187 int ret;
188 u8 val;
189
190 ret = kstrtou8(buf, 10, &val);
191 if (ret)
192 goto error_ret;
193 ret = ade7754_spi_write_reg_8(dev, this_attr->address, val);
194
195 error_ret:
196 return ret ? ret : len;
197 }
198
ade7754_write_16bit(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)199 static ssize_t ade7754_write_16bit(struct device *dev,
200 struct device_attribute *attr,
201 const char *buf,
202 size_t len)
203 {
204 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
205 int ret;
206 u16 val;
207
208 ret = kstrtou16(buf, 10, &val);
209 if (ret)
210 goto error_ret;
211 ret = ade7754_spi_write_reg_16(dev, this_attr->address, val);
212
213 error_ret:
214 return ret ? ret : len;
215 }
216
ade7754_reset(struct device * dev)217 static int ade7754_reset(struct device *dev)
218 {
219 u8 val;
220
221 ade7754_spi_read_reg_8(dev, ADE7754_OPMODE, &val);
222 val |= 1 << 6; /* Software Chip Reset */
223 return ade7754_spi_write_reg_8(dev, ADE7754_OPMODE, val);
224 }
225
226 static IIO_DEV_ATTR_AENERGY(ade7754_read_24bit, ADE7754_AENERGY);
227 static IIO_DEV_ATTR_LAENERGY(ade7754_read_24bit, ADE7754_LAENERGY);
228 static IIO_DEV_ATTR_VAENERGY(ade7754_read_24bit, ADE7754_VAENERGY);
229 static IIO_DEV_ATTR_LVAENERGY(ade7754_read_24bit, ADE7754_LVAENERGY);
230 static IIO_DEV_ATTR_VPEAK(S_IWUSR | S_IRUGO,
231 ade7754_read_8bit,
232 ade7754_write_8bit,
233 ADE7754_VPEAK);
234 static IIO_DEV_ATTR_IPEAK(S_IWUSR | S_IRUGO,
235 ade7754_read_8bit,
236 ade7754_write_8bit,
237 ADE7754_VPEAK);
238 static IIO_DEV_ATTR_APHCAL(S_IWUSR | S_IRUGO,
239 ade7754_read_8bit,
240 ade7754_write_8bit,
241 ADE7754_APHCAL);
242 static IIO_DEV_ATTR_BPHCAL(S_IWUSR | S_IRUGO,
243 ade7754_read_8bit,
244 ade7754_write_8bit,
245 ADE7754_BPHCAL);
246 static IIO_DEV_ATTR_CPHCAL(S_IWUSR | S_IRUGO,
247 ade7754_read_8bit,
248 ade7754_write_8bit,
249 ADE7754_CPHCAL);
250 static IIO_DEV_ATTR_AAPOS(S_IWUSR | S_IRUGO,
251 ade7754_read_16bit,
252 ade7754_write_16bit,
253 ADE7754_AAPOS);
254 static IIO_DEV_ATTR_BAPOS(S_IWUSR | S_IRUGO,
255 ade7754_read_16bit,
256 ade7754_write_16bit,
257 ADE7754_BAPOS);
258 static IIO_DEV_ATTR_CAPOS(S_IWUSR | S_IRUGO,
259 ade7754_read_16bit,
260 ade7754_write_16bit,
261 ADE7754_CAPOS);
262 static IIO_DEV_ATTR_WDIV(S_IWUSR | S_IRUGO,
263 ade7754_read_8bit,
264 ade7754_write_8bit,
265 ADE7754_WDIV);
266 static IIO_DEV_ATTR_VADIV(S_IWUSR | S_IRUGO,
267 ade7754_read_8bit,
268 ade7754_write_8bit,
269 ADE7754_VADIV);
270 static IIO_DEV_ATTR_CFNUM(S_IWUSR | S_IRUGO,
271 ade7754_read_16bit,
272 ade7754_write_16bit,
273 ADE7754_CFNUM);
274 static IIO_DEV_ATTR_CFDEN(S_IWUSR | S_IRUGO,
275 ade7754_read_16bit,
276 ade7754_write_16bit,
277 ADE7754_CFDEN);
278 static IIO_DEV_ATTR_ACTIVE_POWER_A_GAIN(S_IWUSR | S_IRUGO,
279 ade7754_read_16bit,
280 ade7754_write_16bit,
281 ADE7754_AAPGAIN);
282 static IIO_DEV_ATTR_ACTIVE_POWER_B_GAIN(S_IWUSR | S_IRUGO,
283 ade7754_read_16bit,
284 ade7754_write_16bit,
285 ADE7754_BAPGAIN);
286 static IIO_DEV_ATTR_ACTIVE_POWER_C_GAIN(S_IWUSR | S_IRUGO,
287 ade7754_read_16bit,
288 ade7754_write_16bit,
289 ADE7754_CAPGAIN);
290 static IIO_DEV_ATTR_AIRMS(S_IRUGO,
291 ade7754_read_24bit,
292 NULL,
293 ADE7754_AIRMS);
294 static IIO_DEV_ATTR_BIRMS(S_IRUGO,
295 ade7754_read_24bit,
296 NULL,
297 ADE7754_BIRMS);
298 static IIO_DEV_ATTR_CIRMS(S_IRUGO,
299 ade7754_read_24bit,
300 NULL,
301 ADE7754_CIRMS);
302 static IIO_DEV_ATTR_AVRMS(S_IRUGO,
303 ade7754_read_24bit,
304 NULL,
305 ADE7754_AVRMS);
306 static IIO_DEV_ATTR_BVRMS(S_IRUGO,
307 ade7754_read_24bit,
308 NULL,
309 ADE7754_BVRMS);
310 static IIO_DEV_ATTR_CVRMS(S_IRUGO,
311 ade7754_read_24bit,
312 NULL,
313 ADE7754_CVRMS);
314 static IIO_DEV_ATTR_AIRMSOS(S_IRUGO,
315 ade7754_read_16bit,
316 ade7754_write_16bit,
317 ADE7754_AIRMSOS);
318 static IIO_DEV_ATTR_BIRMSOS(S_IRUGO,
319 ade7754_read_16bit,
320 ade7754_write_16bit,
321 ADE7754_BIRMSOS);
322 static IIO_DEV_ATTR_CIRMSOS(S_IRUGO,
323 ade7754_read_16bit,
324 ade7754_write_16bit,
325 ADE7754_CIRMSOS);
326 static IIO_DEV_ATTR_AVRMSOS(S_IRUGO,
327 ade7754_read_16bit,
328 ade7754_write_16bit,
329 ADE7754_AVRMSOS);
330 static IIO_DEV_ATTR_BVRMSOS(S_IRUGO,
331 ade7754_read_16bit,
332 ade7754_write_16bit,
333 ADE7754_BVRMSOS);
334 static IIO_DEV_ATTR_CVRMSOS(S_IRUGO,
335 ade7754_read_16bit,
336 ade7754_write_16bit,
337 ADE7754_CVRMSOS);
338
ade7754_set_irq(struct device * dev,bool enable)339 static int ade7754_set_irq(struct device *dev, bool enable)
340 {
341 int ret;
342 u16 irqen;
343
344 ret = ade7754_spi_read_reg_16(dev, ADE7754_IRQEN, &irqen);
345 if (ret)
346 goto error_ret;
347
348 if (enable)
349 irqen |= 1 << 14; /* Enables an interrupt when a data is
350 present in the waveform register */
351 else
352 irqen &= ~(1 << 14);
353
354 ret = ade7754_spi_write_reg_16(dev, ADE7754_IRQEN, irqen);
355 if (ret)
356 goto error_ret;
357
358 error_ret:
359 return ret;
360 }
361
362 /* Power down the device */
ade7754_stop_device(struct device * dev)363 static int ade7754_stop_device(struct device *dev)
364 {
365 u8 val;
366
367 ade7754_spi_read_reg_8(dev, ADE7754_OPMODE, &val);
368 val |= 7 << 3; /* ADE7754 powered down */
369 return ade7754_spi_write_reg_8(dev, ADE7754_OPMODE, val);
370 }
371
ade7754_initial_setup(struct iio_dev * indio_dev)372 static int ade7754_initial_setup(struct iio_dev *indio_dev)
373 {
374 int ret;
375 struct ade7754_state *st = iio_priv(indio_dev);
376 struct device *dev = &indio_dev->dev;
377
378 /* use low spi speed for init */
379 st->us->mode = SPI_MODE_3;
380 spi_setup(st->us);
381
382 /* Disable IRQ */
383 ret = ade7754_set_irq(dev, false);
384 if (ret) {
385 dev_err(dev, "disable irq failed");
386 goto err_ret;
387 }
388
389 ade7754_reset(dev);
390 msleep(ADE7754_STARTUP_DELAY);
391
392 err_ret:
393 return ret;
394 }
395
ade7754_read_frequency(struct device * dev,struct device_attribute * attr,char * buf)396 static ssize_t ade7754_read_frequency(struct device *dev,
397 struct device_attribute *attr,
398 char *buf)
399 {
400 int ret;
401 u8 t;
402 int sps;
403
404 ret = ade7754_spi_read_reg_8(dev,
405 ADE7754_WAVMODE,
406 &t);
407 if (ret)
408 return ret;
409
410 t = (t >> 3) & 0x3;
411 sps = 26000 / (1 + t);
412
413 return sprintf(buf, "%d\n", sps);
414 }
415
ade7754_write_frequency(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)416 static ssize_t ade7754_write_frequency(struct device *dev,
417 struct device_attribute *attr,
418 const char *buf,
419 size_t len)
420 {
421 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
422 struct ade7754_state *st = iio_priv(indio_dev);
423 u16 val;
424 int ret;
425 u8 reg, t;
426
427 ret = kstrtou16(buf, 10, &val);
428 if (ret)
429 return ret;
430 if (val == 0)
431 return -EINVAL;
432
433 mutex_lock(&indio_dev->mlock);
434
435 t = (26000 / val);
436 if (t > 0)
437 t--;
438
439 if (t > 1)
440 st->us->max_speed_hz = ADE7754_SPI_SLOW;
441 else
442 st->us->max_speed_hz = ADE7754_SPI_FAST;
443
444 ret = ade7754_spi_read_reg_8(dev, ADE7754_WAVMODE, ®);
445 if (ret)
446 goto out;
447
448 reg &= ~(3 << 3);
449 reg |= t << 3;
450
451 ret = ade7754_spi_write_reg_8(dev, ADE7754_WAVMODE, reg);
452
453 out:
454 mutex_unlock(&indio_dev->mlock);
455
456 return ret ? ret : len;
457 }
458 static IIO_DEV_ATTR_TEMP_RAW(ade7754_read_8bit);
459 static IIO_CONST_ATTR(in_temp_offset, "129 C");
460 static IIO_CONST_ATTR(in_temp_scale, "4 C");
461
462 static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
463 ade7754_read_frequency,
464 ade7754_write_frequency);
465
466 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("26000 13000 65000 33000");
467
468 static struct attribute *ade7754_attributes[] = {
469 &iio_dev_attr_in_temp_raw.dev_attr.attr,
470 &iio_const_attr_in_temp_offset.dev_attr.attr,
471 &iio_const_attr_in_temp_scale.dev_attr.attr,
472 &iio_dev_attr_sampling_frequency.dev_attr.attr,
473 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
474 &iio_dev_attr_aenergy.dev_attr.attr,
475 &iio_dev_attr_laenergy.dev_attr.attr,
476 &iio_dev_attr_vaenergy.dev_attr.attr,
477 &iio_dev_attr_lvaenergy.dev_attr.attr,
478 &iio_dev_attr_vpeak.dev_attr.attr,
479 &iio_dev_attr_ipeak.dev_attr.attr,
480 &iio_dev_attr_aphcal.dev_attr.attr,
481 &iio_dev_attr_bphcal.dev_attr.attr,
482 &iio_dev_attr_cphcal.dev_attr.attr,
483 &iio_dev_attr_aapos.dev_attr.attr,
484 &iio_dev_attr_bapos.dev_attr.attr,
485 &iio_dev_attr_capos.dev_attr.attr,
486 &iio_dev_attr_wdiv.dev_attr.attr,
487 &iio_dev_attr_vadiv.dev_attr.attr,
488 &iio_dev_attr_cfnum.dev_attr.attr,
489 &iio_dev_attr_cfden.dev_attr.attr,
490 &iio_dev_attr_active_power_a_gain.dev_attr.attr,
491 &iio_dev_attr_active_power_b_gain.dev_attr.attr,
492 &iio_dev_attr_active_power_c_gain.dev_attr.attr,
493 &iio_dev_attr_airms.dev_attr.attr,
494 &iio_dev_attr_birms.dev_attr.attr,
495 &iio_dev_attr_cirms.dev_attr.attr,
496 &iio_dev_attr_avrms.dev_attr.attr,
497 &iio_dev_attr_bvrms.dev_attr.attr,
498 &iio_dev_attr_cvrms.dev_attr.attr,
499 &iio_dev_attr_airmsos.dev_attr.attr,
500 &iio_dev_attr_birmsos.dev_attr.attr,
501 &iio_dev_attr_cirmsos.dev_attr.attr,
502 &iio_dev_attr_avrmsos.dev_attr.attr,
503 &iio_dev_attr_bvrmsos.dev_attr.attr,
504 &iio_dev_attr_cvrmsos.dev_attr.attr,
505 NULL,
506 };
507
508 static const struct attribute_group ade7754_attribute_group = {
509 .attrs = ade7754_attributes,
510 };
511
512 static const struct iio_info ade7754_info = {
513 .attrs = &ade7754_attribute_group,
514 .driver_module = THIS_MODULE,
515 };
516
ade7754_probe(struct spi_device * spi)517 static int ade7754_probe(struct spi_device *spi)
518 {
519 int ret;
520 struct ade7754_state *st;
521 struct iio_dev *indio_dev;
522
523 /* setup the industrialio driver allocated elements */
524 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
525 if (!indio_dev)
526 return -ENOMEM;
527 /* this is only used for removal purposes */
528 spi_set_drvdata(spi, indio_dev);
529
530 st = iio_priv(indio_dev);
531 st->us = spi;
532 mutex_init(&st->buf_lock);
533
534 indio_dev->name = spi->dev.driver->name;
535 indio_dev->dev.parent = &spi->dev;
536 indio_dev->info = &ade7754_info;
537 indio_dev->modes = INDIO_DIRECT_MODE;
538
539 /* Get the device into a sane initial state */
540 ret = ade7754_initial_setup(indio_dev);
541 if (ret)
542 return ret;
543 ret = iio_device_register(indio_dev);
544 if (ret)
545 return ret;
546
547 return 0;
548 }
549
550 /* fixme, confirm ordering in this function */
ade7754_remove(struct spi_device * spi)551 static int ade7754_remove(struct spi_device *spi)
552 {
553 struct iio_dev *indio_dev = spi_get_drvdata(spi);
554
555 iio_device_unregister(indio_dev);
556 ade7754_stop_device(&indio_dev->dev);
557
558 return 0;
559 }
560
561 static struct spi_driver ade7754_driver = {
562 .driver = {
563 .name = "ade7754",
564 .owner = THIS_MODULE,
565 },
566 .probe = ade7754_probe,
567 .remove = ade7754_remove,
568 };
569 module_spi_driver(ade7754_driver);
570
571 MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
572 MODULE_DESCRIPTION("Analog Devices ADE7754 Polyphase Multifunction Energy Metering IC Driver");
573 MODULE_LICENSE("GPL v2");
574 MODULE_ALIAS("spi:ad7754");
575