1 #ifndef __SAMSUNG_H 2 #define __SAMSUNG_H 3 4 /* 5 * Driver for Samsung SoC onboard UARTs. 6 * 7 * Ben Dooks, Copyright (c) 2003-2008 Simtec Electronics 8 * http://armlinux.simtec.co.uk/ 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13 */ 14 15 struct s3c24xx_uart_info { 16 char *name; 17 unsigned int type; 18 unsigned int fifosize; 19 unsigned long rx_fifomask; 20 unsigned long rx_fifoshift; 21 unsigned long rx_fifofull; 22 unsigned long tx_fifomask; 23 unsigned long tx_fifoshift; 24 unsigned long tx_fifofull; 25 unsigned int def_clk_sel; 26 unsigned long num_clks; 27 unsigned long clksel_mask; 28 unsigned long clksel_shift; 29 30 /* uart port features */ 31 32 unsigned int has_divslot:1; 33 34 /* uart controls */ 35 int (*reset_port)(struct uart_port *, struct s3c2410_uartcfg *); 36 }; 37 38 struct s3c24xx_serial_drv_data { 39 struct s3c24xx_uart_info *info; 40 struct s3c2410_uartcfg *def_cfg; 41 unsigned int fifosize[CONFIG_SERIAL_SAMSUNG_UARTS]; 42 }; 43 44 struct s3c24xx_uart_port { 45 unsigned char rx_claimed; 46 unsigned char tx_claimed; 47 unsigned int pm_level; 48 unsigned long baudclk_rate; 49 50 unsigned int rx_irq; 51 unsigned int tx_irq; 52 53 struct s3c24xx_uart_info *info; 54 struct clk *clk; 55 struct clk *baudclk; 56 struct uart_port port; 57 struct s3c24xx_serial_drv_data *drv_data; 58 59 /* reference to platform data */ 60 struct s3c2410_uartcfg *cfg; 61 62 #ifdef CONFIG_CPU_FREQ 63 struct notifier_block freq_transition; 64 #endif 65 }; 66 67 /* conversion functions */ 68 69 #define s3c24xx_dev_to_port(__dev) dev_get_drvdata(__dev) 70 71 /* register access controls */ 72 73 #define portaddr(port, reg) ((port)->membase + (reg)) 74 #define portaddrl(port, reg) \ 75 ((unsigned long *)(unsigned long)((port)->membase + (reg))) 76 77 #define rd_regb(port, reg) (__raw_readb(portaddr(port, reg))) 78 #define rd_regl(port, reg) (__raw_readl(portaddr(port, reg))) 79 80 #define wr_regb(port, reg, val) __raw_writeb(val, portaddr(port, reg)) 81 #define wr_regl(port, reg, val) __raw_writel(val, portaddr(port, reg)) 82 83 #endif 84