Lines Matching refs:erratum
1225 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
1234 (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
1250 erratum. For very specific sequences of memory operations, it is
1263 erratum. Any asynchronous access to the L2 cache may encounter a
1275 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
1287 (r2p0..r2p2) erratum. Under certain conditions, specific to the
1314 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
1316 As a consequence of this erratum, some TLB entries which should be
1328 rare circumstances, due to this erratum, write data can be lost when
1337 (r2p*) erratum. Under very rare conditions, a faulty
1350 to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
1359 This option enables the workaround for the 753970 PL310 (r3p0) erratum.
1375 r3p*) erratum. A speculative memory access may cause a page table walk
1386 r2p0) erratum. The Store Buffer does not have any automatic draining
1397 r0p2 erratum (possible cache data corruption with
1408 This option enables the workaround for erratum 764369
1435 r2p6,r2p8,r2p10,r3p0) erratum. In case a date cache maintenance