Lines Matching refs:div4_clks
192 static struct clk div4_clks[DIV4_NR] = { variable
244 [MSTP131] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 31, 0), /* VEU3 */
245 [MSTP130] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 30, 0), /* VEU2 */
246 [MSTP129] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 29, 0), /* VEU1 */
247 [MSTP128] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 28, 0), /* VEU0 */
249 [MSTP106] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 6, 0), /* JPU */
250 [MSTP101] = MSTP(&div4_clks[DIV4_M1], SMSTPCR1, 1, 0), /* VPU */
264 [MSTP315] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 15, 0), /* FLCTL */
265 [MSTP314] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 14, 0), /* SDHI0 */
266 [MSTP313] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 13, 0), /* SDHI1 */
283 CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]),
284 CLKDEV_CON_ID("zg_clk", &div4_clks[DIV4_ZG]),
285 CLKDEV_CON_ID("b_clk", &div4_clks[DIV4_B]),
286 CLKDEV_CON_ID("m1_clk", &div4_clks[DIV4_M1]),
287 CLKDEV_CON_ID("csir_clk", &div4_clks[DIV4_CSIR]),
288 CLKDEV_CON_ID("ztr_clk", &div4_clks[DIV4_ZTR]),
289 CLKDEV_CON_ID("zt_clk", &div4_clks[DIV4_ZT]),
290 CLKDEV_CON_ID("z_clk", &div4_clks[DIV4_Z]),
291 CLKDEV_CON_ID("hp_clk", &div4_clks[DIV4_HP]),
292 CLKDEV_CON_ID("zs_clk", &div4_clks[DIV4_ZS]),
293 CLKDEV_CON_ID("zb_clk", &div4_clks[DIV4_ZB]),
294 CLKDEV_CON_ID("zb3_clk", &div4_clks[DIV4_ZB3]),
295 CLKDEV_CON_ID("cp_clk", &div4_clks[DIV4_CP]),
352 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); in sh7377_clock_init()