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Lines Matching refs:sel

292 	const struct clk_mux_sel *sel;  in tegra2_super_clk_init()  local
300 for (sel = c->inputs; sel->input != NULL; sel++) { in tegra2_super_clk_init()
301 if (sel->value == source) in tegra2_super_clk_init()
304 BUG_ON(sel->input == NULL); in tegra2_super_clk_init()
305 c->parent = sel->input; in tegra2_super_clk_init()
325 const struct clk_mux_sel *sel; in tegra2_super_clk_set_parent() local
333 for (sel = c->inputs; sel->input != NULL; sel++) { in tegra2_super_clk_set_parent()
334 if (sel->input == p) { in tegra2_super_clk_set_parent()
336 val |= sel->value << shift; in tegra2_super_clk_set_parent()
669 const struct clk_pll_freq_table *sel; in tegra2_pll_clk_set_rate() local
674 for (sel = c->u.pll.freq_table; sel->input_rate != 0; sel++) { in tegra2_pll_clk_set_rate()
675 if (sel->input_rate == input_rate && sel->output_rate == rate) { in tegra2_pll_clk_set_rate()
676 c->mul = sel->n; in tegra2_pll_clk_set_rate()
677 c->div = sel->m * sel->p; in tegra2_pll_clk_set_rate()
684 val |= (sel->m << PLL_BASE_DIVM_SHIFT) | in tegra2_pll_clk_set_rate()
685 (sel->n << PLL_BASE_DIVN_SHIFT); in tegra2_pll_clk_set_rate()
686 BUG_ON(sel->p < 1 || sel->p > 2); in tegra2_pll_clk_set_rate()
688 if (sel->p == 1) in tegra2_pll_clk_set_rate()
691 if (sel->p == 2) in tegra2_pll_clk_set_rate()
699 val |= sel->cpcon << PLL_MISC_CPCON_SHIFT; in tegra2_pll_clk_set_rate()
910 const struct clk_mux_sel *sel; in tegra2_periph_clk_init() local
912 for (sel = c->inputs; sel->input != NULL; sel++) { in tegra2_periph_clk_init()
913 if (val >> PERIPH_CLK_SOURCE_SHIFT == sel->value) in tegra2_periph_clk_init()
914 mux = sel; in tegra2_periph_clk_init()
1025 const struct clk_mux_sel *sel; in tegra2_periph_clk_set_parent() local
1027 for (sel = c->inputs; sel->input != NULL; sel++) { in tegra2_periph_clk_set_parent()
1028 if (sel->input == p) { in tegra2_periph_clk_set_parent()
1031 val |= (sel->value) << PERIPH_CLK_SOURCE_SHIFT; in tegra2_periph_clk_set_parent()
1241 const struct clk_mux_sel *sel; in tegra2_audio_sync_clk_init() local
1245 for (sel = c->inputs; sel->input != NULL; sel++) in tegra2_audio_sync_clk_init()
1246 if (sel->value == source) in tegra2_audio_sync_clk_init()
1248 BUG_ON(sel->input == NULL); in tegra2_audio_sync_clk_init()
1249 c->parent = sel->input; in tegra2_audio_sync_clk_init()
1266 const struct clk_mux_sel *sel; in tegra2_audio_sync_clk_set_parent() local
1267 for (sel = c->inputs; sel->input != NULL; sel++) { in tegra2_audio_sync_clk_set_parent()
1268 if (sel->input == p) { in tegra2_audio_sync_clk_set_parent()
1271 val |= sel->value; in tegra2_audio_sync_clk_set_parent()
1913 struct clk_mux_sel *sel = mux_audio_sync_clk; in init_audio_sync_clock_mux() local
1917 for (i = 0; src->name; i++, sel++, src++) { in init_audio_sync_clock_mux()
1918 sel->input = tegra_get_clock_by_name(src->name); in init_audio_sync_clock_mux()
1919 if (!sel->input) in init_audio_sync_clock_mux()
1922 sel->value = src->value; in init_audio_sync_clock_mux()