Lines Matching refs:base
247 void __iomem *base = phy->pad_regs; in utmip_pad_power_on() local
254 val = readl(base + UTMIP_BIAS_CFG0); in utmip_pad_power_on()
256 writel(val, base + UTMIP_BIAS_CFG0); in utmip_pad_power_on()
267 void __iomem *base = phy->pad_regs; in utmip_pad_power_off() local
279 val = readl(base + UTMIP_BIAS_CFG0); in utmip_pad_power_off()
281 writel(val, base + UTMIP_BIAS_CFG0); in utmip_pad_power_off()
306 void __iomem *base = phy->regs; in utmi_phy_clk_disable() local
309 val = readl(base + USB_SUSP_CTRL); in utmi_phy_clk_disable()
311 writel(val, base + USB_SUSP_CTRL); in utmi_phy_clk_disable()
315 val = readl(base + USB_SUSP_CTRL); in utmi_phy_clk_disable()
317 writel(val, base + USB_SUSP_CTRL); in utmi_phy_clk_disable()
321 val = readl(base + USB_PORTSC1); in utmi_phy_clk_disable()
323 writel(val, base + USB_PORTSC1); in utmi_phy_clk_disable()
326 if (utmi_wait_register(base + USB_SUSP_CTRL, USB_PHY_CLK_VALID, 0) < 0) in utmi_phy_clk_disable()
333 void __iomem *base = phy->regs; in utmi_phy_clk_enable() local
336 val = readl(base + USB_SUSP_CTRL); in utmi_phy_clk_enable()
338 writel(val, base + USB_SUSP_CTRL); in utmi_phy_clk_enable()
342 val = readl(base + USB_SUSP_CTRL); in utmi_phy_clk_enable()
344 writel(val, base + USB_SUSP_CTRL); in utmi_phy_clk_enable()
348 val = readl(base + USB_PORTSC1); in utmi_phy_clk_enable()
350 writel(val, base + USB_PORTSC1); in utmi_phy_clk_enable()
353 if (utmi_wait_register(base + USB_SUSP_CTRL, USB_PHY_CLK_VALID, in utmi_phy_clk_enable()
361 void __iomem *base = phy->regs; in utmi_phy_power_on() local
364 val = readl(base + USB_SUSP_CTRL); in utmi_phy_power_on()
366 writel(val, base + USB_SUSP_CTRL); in utmi_phy_power_on()
369 val = readl(base + USB1_LEGACY_CTRL); in utmi_phy_power_on()
371 writel(val, base + USB1_LEGACY_CTRL); in utmi_phy_power_on()
374 val = readl(base + UTMIP_TX_CFG0); in utmi_phy_power_on()
376 writel(val, base + UTMIP_TX_CFG0); in utmi_phy_power_on()
378 val = readl(base + UTMIP_HSRX_CFG0); in utmi_phy_power_on()
382 writel(val, base + UTMIP_HSRX_CFG0); in utmi_phy_power_on()
384 val = readl(base + UTMIP_HSRX_CFG1); in utmi_phy_power_on()
387 writel(val, base + UTMIP_HSRX_CFG1); in utmi_phy_power_on()
389 val = readl(base + UTMIP_DEBOUNCE_CFG0); in utmi_phy_power_on()
392 writel(val, base + UTMIP_DEBOUNCE_CFG0); in utmi_phy_power_on()
394 val = readl(base + UTMIP_MISC_CFG0); in utmi_phy_power_on()
396 writel(val, base + UTMIP_MISC_CFG0); in utmi_phy_power_on()
398 val = readl(base + UTMIP_MISC_CFG1); in utmi_phy_power_on()
402 writel(val, base + UTMIP_MISC_CFG1); in utmi_phy_power_on()
404 val = readl(base + UTMIP_PLL_CFG1); in utmi_phy_power_on()
408 writel(val, base + UTMIP_PLL_CFG1); in utmi_phy_power_on()
411 val = readl(base + USB_SUSP_CTRL); in utmi_phy_power_on()
413 writel(val, base + USB_SUSP_CTRL); in utmi_phy_power_on()
418 val = readl(base + UTMIP_XCVR_CFG0); in utmi_phy_power_on()
426 writel(val, base + UTMIP_XCVR_CFG0); in utmi_phy_power_on()
428 val = readl(base + UTMIP_XCVR_CFG1); in utmi_phy_power_on()
432 writel(val, base + UTMIP_XCVR_CFG1); in utmi_phy_power_on()
434 val = readl(base + UTMIP_BAT_CHRG_CFG0); in utmi_phy_power_on()
436 writel(val, base + UTMIP_BAT_CHRG_CFG0); in utmi_phy_power_on()
438 val = readl(base + UTMIP_BIAS_CFG1); in utmi_phy_power_on()
441 writel(val, base + UTMIP_BIAS_CFG1); in utmi_phy_power_on()
444 val = readl(base + UTMIP_SPARE_CFG0); in utmi_phy_power_on()
449 writel(val, base + UTMIP_SPARE_CFG0); in utmi_phy_power_on()
453 val = readl(base + USB_SUSP_CTRL); in utmi_phy_power_on()
455 writel(val, base + USB_SUSP_CTRL); in utmi_phy_power_on()
458 val = readl(base + USB_SUSP_CTRL); in utmi_phy_power_on()
460 writel(val, base + USB_SUSP_CTRL); in utmi_phy_power_on()
463 val = readl(base + USB1_LEGACY_CTRL); in utmi_phy_power_on()
466 writel(val, base + USB1_LEGACY_CTRL); in utmi_phy_power_on()
468 val = readl(base + USB_SUSP_CTRL); in utmi_phy_power_on()
470 writel(val, base + USB_SUSP_CTRL); in utmi_phy_power_on()
476 val = readl(base + USB_PORTSC1); in utmi_phy_power_on()
478 writel(val, base + USB_PORTSC1); in utmi_phy_power_on()
487 void __iomem *base = phy->regs; in utmi_phy_power_off() local
492 val = readl(base + USB_SUSP_CTRL); in utmi_phy_power_off()
495 writel(val, base + USB_SUSP_CTRL); in utmi_phy_power_off()
498 val = readl(base + USB_SUSP_CTRL); in utmi_phy_power_off()
500 writel(val, base + USB_SUSP_CTRL); in utmi_phy_power_off()
502 val = readl(base + UTMIP_BAT_CHRG_CFG0); in utmi_phy_power_off()
504 writel(val, base + UTMIP_BAT_CHRG_CFG0); in utmi_phy_power_off()
506 val = readl(base + UTMIP_XCVR_CFG0); in utmi_phy_power_off()
509 writel(val, base + UTMIP_XCVR_CFG0); in utmi_phy_power_off()
511 val = readl(base + UTMIP_XCVR_CFG1); in utmi_phy_power_off()
514 writel(val, base + UTMIP_XCVR_CFG1); in utmi_phy_power_off()
522 void __iomem *base = phy->regs; in utmi_phy_preresume() local
524 val = readl(base + UTMIP_TX_CFG0); in utmi_phy_preresume()
526 writel(val, base + UTMIP_TX_CFG0); in utmi_phy_preresume()
532 void __iomem *base = phy->regs; in utmi_phy_postresume() local
534 val = readl(base + UTMIP_TX_CFG0); in utmi_phy_postresume()
536 writel(val, base + UTMIP_TX_CFG0); in utmi_phy_postresume()
543 void __iomem *base = phy->regs; in utmi_phy_restore_start() local
545 val = readl(base + UTMIP_MISC_CFG0); in utmi_phy_restore_start()
551 writel(val, base + UTMIP_MISC_CFG0); in utmi_phy_restore_start()
554 val = readl(base + UTMIP_MISC_CFG0); in utmi_phy_restore_start()
556 writel(val, base + UTMIP_MISC_CFG0); in utmi_phy_restore_start()
563 void __iomem *base = phy->regs; in utmi_phy_restore_end() local
565 val = readl(base + UTMIP_MISC_CFG0); in utmi_phy_restore_end()
567 writel(val, base + UTMIP_MISC_CFG0); in utmi_phy_restore_end()
575 void __iomem *base = phy->regs; in ulpi_phy_power_on() local
585 val = readl(base + USB_SUSP_CTRL); in ulpi_phy_power_on()
587 writel(val, base + USB_SUSP_CTRL); in ulpi_phy_power_on()
589 val = readl(base + ULPI_TIMING_CTRL_0); in ulpi_phy_power_on()
591 writel(val, base + ULPI_TIMING_CTRL_0); in ulpi_phy_power_on()
593 val = readl(base + USB_SUSP_CTRL); in ulpi_phy_power_on()
595 writel(val, base + USB_SUSP_CTRL); in ulpi_phy_power_on()
598 writel(val, base + ULPI_TIMING_CTRL_1); in ulpi_phy_power_on()
603 writel(val, base + ULPI_TIMING_CTRL_1); in ulpi_phy_power_on()
609 writel(val, base + ULPI_TIMING_CTRL_1); in ulpi_phy_power_on()
624 val = readl(base + USB_PORTSC1); in ulpi_phy_power_on()
626 writel(val, base + USB_PORTSC1); in ulpi_phy_power_on()
628 val = readl(base + USB_SUSP_CTRL); in ulpi_phy_power_on()
630 writel(val, base + USB_SUSP_CTRL); in ulpi_phy_power_on()
633 val = readl(base + USB_SUSP_CTRL); in ulpi_phy_power_on()
635 writel(val, base + USB_SUSP_CTRL); in ulpi_phy_power_on()
643 void __iomem *base = phy->regs; in ulpi_phy_power_off() local
649 val = readl(base + USB_PORTSC1); in ulpi_phy_power_off()
651 writel(val, base + USB_PORTSC1); in ulpi_phy_power_off()