Lines Matching refs:t1
132 mfc0 t1,CP0_STATUS
137 and t0,t1 # isolate allowed ones
149 PTR_LA t1,cpu_mask_nr_tbl
150 1: lw t2,(t1)
154 addu t1,2*PTRSIZE # delay slot
159 lw a0,(-PTRSIZE)(t1)
178 andi t1,t0,KN02_IRQ_ALL
188 lw t1,IO_REG_SIMR(t2) # get mask: IOASIC simr
191 1: and t0,t1 # mask out allowed ones
198 PTR_LA t1,asic_mask_nr_tbl
199 2: lw t2,(t1)
203 addu t1,2*PTRSIZE # delay slot
208 lw a0,%lo(-PTRSIZE)(t1)
224 li t1,CAUSEF_IP>>CAUSEB_IP # mask
230 li t1,KN02_IRQ_ALL # mask
236 li t1,IO_IRQ_ALL # mask
246 li t1,IO_IRQ_DMA>>IO_INR_DMA # mask
253 1: srlv t3,t1,t2
254 2: xor t1,t3
255 and t3,t0,t1
262 srlv t3,t1,t2