Lines Matching defs:ch
20 #define TX3927_TMR_REG(ch) (TX3927_REG_BASE + 0xf000 + (ch) * 0x100) argument
22 #define TX3927_SIO_REG(ch) (TX3927_REG_BASE + 0xf300 + (ch) * 0x100) argument
46 } ch[4]; member
162 #define TX3927_DMA_MCR_EIS(ch) (0x10000000<<(ch)) argument
163 #define TX3927_DMA_MCR_DIS(ch) (0x01000000<<(ch)) argument
165 #define TX3927_DMA_MCR_FIFUM(ch) (0x00000008<<(ch)) argument
221 #define TX3927_IR_SIO(ch) (6 + (ch)) argument
225 #define TX3927_IR_TMR(ch) (13 + (ch)) argument
298 #define TX3927_PCFG_SDRCLKEN(ch) (0x00400000<<(ch)) argument
300 #define TX3927_PCFG_PCICLKEN(ch) (0x00040000<<(ch)) argument
305 #define TX3927_PCFG_SELSIOC(ch) (0x00004000<<(ch)) argument
307 #define TX3927_PCFG_SELSIO(ch) (0x00001000<<(ch)) argument
309 #define TX3927_PCFG_SELTMR(ch) (0x00000200<<(ch)) argument
312 #define TX3927_PCFG_INTDMA(ch) (0x00000010<<(ch)) argument
314 #define TX3927_PCFG_SELDMA(ch) (0x00000001<<(ch)) argument
321 #define tx3927_sioptr(ch) ((struct txx927_sio_reg *)TX3927_SIO_REG(ch)) argument
325 #define TX3927_ROMC_BA(ch) (tx3927_romcptr->cr[(ch)] & 0xfff00000) argument
326 #define TX3927_ROMC_SIZE(ch) \ argument
328 #define TX3927_ROMC_WIDTH(ch) (32 >> ((tx3927_romcptr->cr[(ch)] >> 7) & 0x1)) argument