25 	unsigned long word;  in __area_sdram_check()  local
27 	word = __raw_readl(SH7751_BCR1);  in __area_sdram_check()
29 	if (((word >> area) & 1) == 0) {  in __area_sdram_check()
31 		       area, word);  in __area_sdram_check()
34 	pci_write_reg(chan, word, SH4_PCIBCR1);  in __area_sdram_check()
36 	word = __raw_readw(SH7751_BCR2);  in __area_sdram_check()
38 	if (((word >> (area << 1)) & 0x3) != 0x3) {  in __area_sdram_check()
40 		       area, word);  in __area_sdram_check()
43 	pci_write_reg(chan, word, SH4_PCIBCR2);  in __area_sdram_check()
82 	u32 word, reg;  in sh7751_pci_init()  local
104 	word = SH4_PCIPINT_D3 | SH4_PCIPINT_D0;  in sh7751_pci_init()
105 	pci_write_reg(chan, word, SH4_PCIPINT);  in sh7751_pci_init()
111 	word = SH7751_PCICONF1_WCC | SH7751_PCICONF1_PER |  in sh7751_pci_init()
113 	pci_write_reg(chan, word, SH7751_PCICONF1);  in sh7751_pci_init()
116 	word = PCI_BASE_CLASS_BRIDGE << 24;  in sh7751_pci_init()
117 	pci_write_reg(chan, word, SH7751_PCICONF2);  in sh7751_pci_init()
122 	word = sh7751_pci_map.window0.size - 1;  in sh7751_pci_init()
123 	pci_write_reg(chan, word, SH4_PCILSR0);  in sh7751_pci_init()
125 	word = P2SEGADDR(sh7751_pci_map.window0.base);  in sh7751_pci_init()
126 	pci_write_reg(chan, word, SH4_PCILAR0);  in sh7751_pci_init()
127 	pci_write_reg(chan, word, SH7751_PCICONF5);  in sh7751_pci_init()
132 	word = chan->resources[1].start & SH4_PCIMBR_MASK;  in sh7751_pci_init()
133 	pr_debug("PCI: Setting upper bits of Memory window to 0x%x\n", word);  in sh7751_pci_init()
134 	pci_write_reg(chan, word , SH4_PCIMBR);  in sh7751_pci_init()
138 	word = chan->resources[0].start & SH4_PCIIOBR_MASK;  in sh7751_pci_init()
139 	pr_debug("PCI: Setting upper bits of IO window to 0x%x\n", word);  in sh7751_pci_init()
140 	pci_write_reg(chan, word, SH4_PCIIOBR);  in sh7751_pci_init()
146 	case SH7751_CS0_BASE_ADDR: word = __area_sdram_check(chan, 0); break;  in sh7751_pci_init()
147 	case SH7751_CS1_BASE_ADDR: word = __area_sdram_check(chan, 1); break;  in sh7751_pci_init()
148 	case SH7751_CS2_BASE_ADDR: word = __area_sdram_check(chan, 2); break;  in sh7751_pci_init()
149 	case SH7751_CS3_BASE_ADDR: word = __area_sdram_check(chan, 3); break;  in sh7751_pci_init()
150 	case SH7751_CS4_BASE_ADDR: word = __area_sdram_check(chan, 4); break;  in sh7751_pci_init()
151 	case SH7751_CS5_BASE_ADDR: word = __area_sdram_check(chan, 5); break;  in sh7751_pci_init()
152 	case SH7751_CS6_BASE_ADDR: word = __area_sdram_check(chan, 6); break;  in sh7751_pci_init()
155 	if (!word)  in sh7751_pci_init()
159 	word = __raw_readl(SH7751_WCR1);  in sh7751_pci_init()
160 	pci_write_reg(chan, word, SH4_PCIWCR1);  in sh7751_pci_init()
161 	word = __raw_readl(SH7751_WCR2);  in sh7751_pci_init()
162 	pci_write_reg(chan, word, SH4_PCIWCR2);  in sh7751_pci_init()
163 	word = __raw_readl(SH7751_WCR3);  in sh7751_pci_init()
164 	pci_write_reg(chan, word, SH4_PCIWCR3);  in sh7751_pci_init()
165 	word = __raw_readl(SH7751_MCR);  in sh7751_pci_init()
166 	pci_write_reg(chan, word, SH4_PCIMCR);  in sh7751_pci_init()
177 	word = SH4_PCICR_PREFIX | SH4_PCICR_CFIN | SH4_PCICR_ARBM;  in sh7751_pci_init()
178 	pci_write_reg(chan, word, SH4_PCICR);  in sh7751_pci_init()