752 	struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);  in intel_pmu_disable_all()  local
756 	if (test_bit(X86_PMC_IDX_FIXED_BTS, cpuc->active_mask))  in intel_pmu_disable_all()
765 	struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);  in intel_pmu_enable_all()  local
770 			x86_pmu.intel_ctrl & ~cpuc->intel_ctrl_guest_mask);  in intel_pmu_enable_all()
772 	if (test_bit(X86_PMC_IDX_FIXED_BTS, cpuc->active_mask)) {  in intel_pmu_enable_all()
774 			cpuc->events[X86_PMC_IDX_FIXED_BTS];  in intel_pmu_enable_all()
799 	struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);  in intel_pmu_nhm_workaround()  local
832 		event = cpuc->events[i];  in intel_pmu_nhm_workaround()
846 		event = cpuc->events[i];  in intel_pmu_nhm_workaround()
893 	struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);  in intel_pmu_disable_event()  local
901 	cpuc->intel_ctrl_guest_mask &= ~(1ull << hwc->idx);  in intel_pmu_disable_event()
902 	cpuc->intel_ctrl_host_mask &= ~(1ull << hwc->idx);  in intel_pmu_disable_event()
956 	struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);  in intel_pmu_enable_event()  local
973 		cpuc->intel_ctrl_guest_mask |= (1ull << hwc->idx);  in intel_pmu_enable_event()
975 		cpuc->intel_ctrl_host_mask |= (1ull << hwc->idx);  in intel_pmu_enable_event()
1031 	struct cpu_hw_events *cpuc;  in intel_pmu_handle_irq()  local
1038 	cpuc = &__get_cpu_var(cpu_hw_events);  in intel_pmu_handle_irq()
1081 		struct perf_event *event = cpuc->events[bit];  in intel_pmu_handle_irq()
1085 		if (!test_bit(bit, cpuc->active_mask))  in intel_pmu_handle_irq()
1094 			data.br_stack = &cpuc->lbr_stack;  in intel_pmu_handle_irq()
1161 __intel_shared_reg_get_constraints(struct cpu_hw_events *cpuc,  in __intel_shared_reg_get_constraints()  argument
1175 	era = &cpuc->shared_regs->regs[reg->idx];  in __intel_shared_reg_get_constraints()
1209 __intel_shared_reg_put_constraints(struct cpu_hw_events *cpuc,  in __intel_shared_reg_put_constraints()  argument
1222 	era = &cpuc->shared_regs->regs[reg->idx];  in __intel_shared_reg_put_constraints()
1232 intel_shared_regs_constraints(struct cpu_hw_events *cpuc,  in intel_shared_regs_constraints()  argument
1240 		c = __intel_shared_reg_get_constraints(cpuc, event, xreg);  in intel_shared_regs_constraints()
1246 		d = __intel_shared_reg_get_constraints(cpuc, event, breg);  in intel_shared_regs_constraints()
1248 			__intel_shared_reg_put_constraints(cpuc, xreg);  in intel_shared_regs_constraints()
1256 x86_get_event_constraints(struct cpu_hw_events *cpuc, struct perf_event *event)  in x86_get_event_constraints()  argument
1271 intel_get_event_constraints(struct cpu_hw_events *cpuc, struct perf_event *event)  in intel_get_event_constraints()  argument
1283 	c = intel_shared_regs_constraints(cpuc, event);  in intel_get_event_constraints()
1287 	return x86_get_event_constraints(cpuc, event);  in intel_get_event_constraints()
1291 intel_put_shared_regs_event_constraints(struct cpu_hw_events *cpuc,  in intel_put_shared_regs_event_constraints()  argument
1298 		__intel_shared_reg_put_constraints(cpuc, reg);  in intel_put_shared_regs_event_constraints()
1302 		__intel_shared_reg_put_constraints(cpuc, reg);  in intel_put_shared_regs_event_constraints()
1305 static void intel_put_event_constraints(struct cpu_hw_events *cpuc,  in intel_put_event_constraints()  argument
1308 	intel_put_shared_regs_event_constraints(cpuc, event);  in intel_put_event_constraints()
1379 	struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);  in intel_guest_get_msrs()  local
1380 	struct perf_guest_switch_msr *arr = cpuc->guest_switch_msrs;  in intel_guest_get_msrs()
1383 	arr[0].host = x86_pmu.intel_ctrl & ~cpuc->intel_ctrl_guest_mask;  in intel_guest_get_msrs()
1384 	arr[0].guest = x86_pmu.intel_ctrl & ~cpuc->intel_ctrl_host_mask;  in intel_guest_get_msrs()
1392 	struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);  in core_guest_get_msrs()  local
1393 	struct perf_guest_switch_msr *arr = cpuc->guest_switch_msrs;  in core_guest_get_msrs()
1397 		struct perf_event *event = cpuc->events[idx];  in core_guest_get_msrs()
1402 		if (!test_bit(idx, cpuc->active_mask))  in core_guest_get_msrs()
1426 	struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);  in core_pmu_enable_all()  local
1430 		struct hw_perf_event *hwc = &cpuc->events[idx]->hw;  in core_pmu_enable_all()
1432 		if (!test_bit(idx, cpuc->active_mask) ||  in core_pmu_enable_all()
1433 				cpuc->events[idx]->attr.exclude_host)  in core_pmu_enable_all()
1506 	struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu);  in intel_pmu_cpu_prepare()  local
1511 	cpuc->shared_regs = allocate_shared_regs(cpu);  in intel_pmu_cpu_prepare()
1512 	if (!cpuc->shared_regs)  in intel_pmu_cpu_prepare()
1520 	struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu);  in intel_pmu_cpu_starting()  local
1530 	cpuc->lbr_sel = NULL;  in intel_pmu_cpu_starting()
1532 	if (!cpuc->shared_regs)  in intel_pmu_cpu_starting()
1541 				cpuc->kfree_on_online = cpuc->shared_regs;  in intel_pmu_cpu_starting()
1542 				cpuc->shared_regs = pc;  in intel_pmu_cpu_starting()
1546 		cpuc->shared_regs->core_id = core_id;  in intel_pmu_cpu_starting()
1547 		cpuc->shared_regs->refcnt++;  in intel_pmu_cpu_starting()
1551 		cpuc->lbr_sel = &cpuc->shared_regs->regs[EXTRA_REG_LBR];  in intel_pmu_cpu_starting()
1556 	struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu);  in intel_pmu_cpu_dying()  local
1559 	pc = cpuc->shared_regs;  in intel_pmu_cpu_dying()
1563 		cpuc->shared_regs = NULL;  in intel_pmu_cpu_dying()